参数资料
型号: ADP5585ACBZ-00-R7
厂商: Analog Devices Inc
文件页数: 2/40页
文件大小: 0K
描述: IC PORT EXPANDER 10I/O 16WLSCP
标准包装: 1
应用: 小键盘输入,输入/输出扩展
接口: I²C
封装/外壳: 16-UFBGA,WLCSP
供应商设备封装: 16-WLCSP(1.59x1.59)
包装: 标准包装
安装类型: 表面贴装
其它名称: ADP5585ACBZ-00-R7DKR
ADP5585
Data Sheet
Rev. C | Page 10 of 40
1
23
4
56
7
89
VDD
R0
R1
R2
C2
C0
C1
3 × 3 KEYPAD MATRIX
09
84
1-
0
08
KEY
SCAN
CONTROL
Figure 9. Simplified Key Scan Block
Figure 9 shows a simplified representation of the key scan block
using three row and three column pins connected to a small 3 × 3,
nine-switch keypad matrix. When the key scanner is idle, the
row pins are pulled high and the column pins are driven low.
The key scanner operates by checking the row pins to see if they
are low.
If Switch 6 in the matrix is pressed, R1 connects to C2. The key
scan circuit senses that one of the row pins has been pulled low,
and a key scan cycle begins. Key scanning involves driving all
column pins high, then driving each column pin, one at a time,
low and sensing whether a row pin is low or not. All row/column
pairs are scanned; therefore, if multiple keys are pressed, they
are detected.
To prevent glitches or narrow press times being registered as a
valid key press, the key scanner requires the key be pressed for
two scan cycles. The key scanner has a wait time between each
scan cycle; therefore, the key must be pressed and held for at
least this wait time to register as being pressed. If the key is
continuously pressed, the key scanner continues to scan, wait,
scan, wait, and so forth.
If Switch 6 is released, the connection between R1 and C2
breaks, and R1 is pulled up high. The key scanner requires that
the key be released for two scan cycles because the release of a
key is not necessarily in sync with the key scanner, it may take
up to two full wait/scan cycles for a key to register as released.
When the key is registered as released, and no other keys are
pressed, the key scanner returns to idle mode.
For the remainder of this document, the press/release status of a
key is represented as simply a logic signal in the figures. A logic
high level represents the key status as pressed, and a logic low
represents released. This eliminates the need to draw individual
row/column signals when describing key events.
KEY x
KEY RELEASED
KEY PRESSED
0
9841-
009
Figure 10. Logic Low: Released, Logic High: Pressed
Figure 11 shows a detailed representation of the key scan block
and its associated control and status signals. When all row and
column pins are used, a matrix of 25 unique keys can be
scanned.
LOGIC EVENT
5
4
3
2
1
10
9
8
7
6
15
14
13
12
11
20
19
18
17
16
25
24
23
22
21
30
29
28
27
26
I/O CONFIGURATION
KEY EVENT
GPI EVENT
I2C BUSY?
R0
R3
R1 R2
R4 R5
C0 C1 C2 C3 C4
PIN_CONFIG_A[7:0]
PIN_CONFIG_B[7:0]
FIFO
PIN_CONFIG_C[7:0]
EVENT_INT
OVRFLOW_INT
EC[4:0]
RESET_TRIG_TIME[2:0]
RESET1_EVENT_A[7:0]
RESET1_EVENT_B[7:0]
RESET1_EVENT_C[7:0]
31
33
36
32
35
34
RESET2_EVENT_A[7:0]
RESET2_EVENT_B[7:0]
RESET 1_INITIATE
RESET 2_INITIATE
09
84
1-
01
0
FIFO
UPDATE
KEY SCAN
CONTROL
COLUMN
SINK ON/OFF
ROW
SENSE
Figure 11. Detailed Key Scan Block
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