参数资料
| 型号： | ADP7104ARDZ-3.3-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 4/28页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 3.3V .5A 8SOIC |
| 标准包装： | 1,000 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 3.3V |
| 输入电压： | 最高 20V |
| 电压 - 压降（标准）： | 0.35V @ 500mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 500mA（最小值） |
| 电流 - 限制（最小）： | 625mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm Width）裸露焊盘 |
| 供应商设备封装： | 8-SOIC-EP |
| 包装： | 带卷 (TR) |
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ADP7104
Data Sheet
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
PROGRAMMABLE EN/UVLO
UVLO Threshold Rising
UVLO Threshold Falling
UVLO RISE
UVLO FALL
3.3 V ≤ V IN ≤ 20 V, T J = ?40°C to +125°C
3.3 V ≤ V IN ≤ 20 V, T J = ?40°C to +125°C, 10 kΩ in
1.18
1.23
1.13
1.28
V
V
series with the enable pin
UVLO Hysteresis Current
UVLO HYS
V EN > 1.25 V, T J = ?40°C to +125°C
7.5
9.8
12
μA
Enable Pull-Down Current
Start Threshold
Shutdown Threshold
Hysteresis
OUTPUT NOISE
I EN-IN
V START
V SHUTDOWN
OUT NOISE
EN = V IN
T J = ?40°C to +125°C
T J = ?40°C to +125°C
10 Hz to 100 kHz, V IN = 5.5 V, V OUT = 1.8 V
10 Hz to 100 kHz, V IN = 6.3 V, V OUT = 3.3 V
10 Hz to 100 kHz, V IN = 8 V, V OUT = 5 V
10 Hz to 100 kHz, V IN = 12 V, V OUT = 9 V
10 Hz to 100 kHz, V IN = 5.5 V, V OUT = 1.5 V,
2.45
500
250
15
15
15
15
18
3.2
nA
V
V
mV
μV rms
μV rms
μV rms
μV rms
μV rms
adjustable mode
10 Hz to 100 kHz, V IN = 12 V, V OUT = 5 V,
adjustable mode
10 Hz to 100 kHz, V IN = 20 V, V OUT = 15 V,
adjustable mode
30
65
μV rms
μV rms
POWER SUPPLY REJECTION RATIO
PSRR
100 kHz, V IN = 4.3 V, V OUT = 3.3 V
100 kHz, V IN = 6 V, V OUT = 5 V
10 kHz, V IN = 4.3 V, V OUT = 3.3 V
10 kHz, V IN = 6 V, V OUT = 5 V
100 kHz, V IN = 3.3 V, V OUT = 1.8 V, adjustable mode
100 kHz, V IN = 6 V, V OUT = 5 V, adjustable mode
100 kHz, V IN = 16 V, V OUT = 15 V, adjustable mode
10 kHz, V IN = 3.3 V, V OUT = 1.8 V, adjustable mode
10 kHz, V IN = 6 V, V OUT = 5 V, adjustable mode
10 kHz, V IN = 16 V, V OUT = 15 V, adjustable mode
50
50
60
60
50
60
60
60
80
80
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
1
2
3
4
Based on an end-point calculation using 1 mA and 300 mA loads. See Figure 6 for typical load regulation performance for loads less than 1 mA.
Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 3.0 V.
Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value.
Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 5.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 5.0 V, or 4.5 V.
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS
Table 2.
Parameter
Minimum Input and Output Capacitance 1
Capacitor ESR
Symbol
C MIN
R ESR
Conditions
T A = ?40°C to +125°C
T A = ?40°C to +125°C
Min
0.7
0.001
Typ
Max
0.2
Unit
μF
Ω
1
The minimum input and output capacitance should be greater than 0.7 μF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
Y5V and Z5U capacitors are not recommended for use with any LDO.
Rev. F | Page 4 of 28
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