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| 型号： | ADP8863ACPZ-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 44/52页 |
| 文件大小： | 0K |
| 描述： | IC LED DRVR WHIT BCKLGT 20-WLCSP |
| 标准包装： | 1 |
| 拓扑： | 切换式电容器（充电泵） |
| 输出数： | 7 |
| 内部驱动器： | 是 |
| 类型 - 主要： | 背光，LED 闪烁器 |
| 类型 - 次要： | RGB，白色 LED |
| 频率： | 800kHz ~ 1.32MHz |
| 电源电压： | 2.5 V ~ 5.5 V |
| 输出电压： | 4.3 V ~ 5.5 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-UFBGA，WLCSP |
| 供应商设备封装： | 20-WLCSP |
| 包装： | 标准包装 |
| 工作温度： | -40°C ~ 85°C |
| 其它名称： | ADP8863ACPZ-R7DKR |
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ADP8863
COMPARATOR REGISTER DESCRIPTIONS
Comparator Configuration (CCFG)—Register 0x1B
Table 65. CCFG Bit Map
Bit 7
Bit 6
FILT
Bit 5
Bit 4
FORCE_RD
Bit 3
L3_OUT
Bit 2
L2_OUT
Bit 1
L3_EN
Bit 0
L2_EN
Table 66. Bit Descriptions for the CCFG Register
Bit Name
FILT
FORCE_RD
L3_OUT
L2_OUT
L3_EN
L2_EN
Bit No.
[7:5]
4
3
2
1
0
Description
Filter setting for the CMP_IN light sensor.
000 = 80 ms
001 = 160 ms
010 = 320 ms
011 = 640 ms
100 = 1280 ms
101 = 2560 ms
110 = 5120 ms
111 = 10,240 ms
Force a read of the CMP_IN light sensor while independent sinks are running, but the backlight is not. Reset by
chip after the conversion is complete and L2_OUT and L3_OUT are valid. Ignored if the backlight is enabled.
This bit is the output of the L3 comparator.
This bit is the output of the L2 comparator.
1 = the L3 comparator is enabled for the CMP_IN comparator.
0 = the L3 comparator is disabled for the CMP_IN comparator.
Note that the L3 comparator has priority over the L2 comparator.
1 = the L2 comparator is enabled for the CMP_IN comparator.
0 = the L2 comparator is disabled for the CMP_IN comparator.
Second Comparator Configuration (CCFG2)—Register 0x1C
Table 67. CCFG2 Bit Map
Bit 7
Bit 6
FILT2
Bit 5
Bit 4
FORCE_RD2
Bit 3
L3_OUT2
Bit 2
L2_OUT2
Bit 1
L3_EN2
Bit 0
L2_EN2
Table 68. Bit Descriptions for the CCFG2 Register
Bit Name
FILT2
FORCE_RD2
L3_OUT2
L2_OUT2
L3_EN2
L2_EN2
Bit No.
[7:5]
4
3
2
1
0
Description
Filter setting for the CMP_IN2 light sensor.
000 = 80 ms
001 = 160 ms
010 = 320 ms
011 = 640 ms
100 = 1280 ms
101 = 2560 ms
110 = 5120 ms
111= 10,240 ms
Force a read of the CMP_IN2 light sensor while independent sinks are running, but the backlight is not. Reset by
chip after the conversion is complete and L2_OUT and L3_OUT are valid. Ignored if backlight is enabled.
This bit is the output of the L3 comparator for the second light sensor.
This bit is the output of the L2 comparator for the second light sensor.
1 = the L3 comparator is enabled for the CMP_IN2 comparator.
0 = the L3 comparator is disabled for the CMP_IN2 comparator.
Note that the L3 comparator has priority over the L2 comparator.
1 = the L2 comparator is enabled for the CMP_IN2 comparator.
0 = the L2 comparator is disabled for the CMP_IN2 comparator.
Rev. A | Page 44 of 52
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