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参数资料
| 型号： | ADS1259EVM |
| 厂商： | Texas Instruments |
| 文件页数： | 16/48页 |
| 文件大小： | 0K |
| 描述： | EVAL MODULE FOR ADS1259 |
| 标准包装： | 1 |
| ADC 的数量： | 1 |
| 位数： | 24 |
| 采样率（每秒）： | 14k |
| 数据接口： | 串行，SPI? |
| 工作温度： | -40°C ~ 125°C |
| 已用 IC / 零件： | ADS1259 |
| 已供物品： | 板 |
| 其它名称： | 296-29312 ADS1259EVM-ND |
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t
SDSU
t
DSHD
Command
(1)
DRDY
START
or
STOP
t
PWL
START
t
STDR
t
PWH
START
DRDY
STARTPin
Halted
Converting
Command
(1)
START
STOP
or
SBAS424D
– JUNE 2009 – REVISED AUGUST 2011
START
When using commands to control conversions, hold
the START pin low. The ADS1259 features two
START is a digital input that controls the ADS1259
modes to control conversions: Gate Control mode
conversions. Conversions are started when START is
and Pulse Control mode. The mode is selected by the
taken high and are stopped when START is taken
PULSE register bit.
low. If START is toggled during a conversion, the
conversion is restarted. DRDY goes high when
Gate Control Mode (PULSE Bit = 0, Default)
START timing.
Conversions begin when either the START pin is
taken high or when the START command is sent.
Note that reasserting START within 22 tCLK cycles of
Conversions continue indefinitely until the START pin
the DRDY falling edge causes DRDY to fall soon
is taken low or the STOP command is transmitted. As
after. This conversion result should be discarded. The
seen in Figure 51, DRDY is forced high when the
next DRDY falling edge, as given in Table 9, is the
conversion starts and falls low when data are ready.
valid conversion data.
When stopped, the conversion in process completes
and further conversions are halted. Figure 50 and
Table 7 show the timing of DRDY and START.
(1) START and STOP commands take effect on the seventh SCLK
falling edge.
Figure 50. START to DRDY Timing
CONVERSION CONTROL
(1) START and STOP opcode commands take effect on the
The conversions of the ADS1259 are controlled by
seventh SCLK falling edge.
either the START pin or by the START command.
Figure 51. Gate Control Mode
Table 7. START Timing (See Figure 50)
SYMBOL
DESCRIPTION
MIN
MAX
UNIT
START pin low or STOP opcode to DRDY setup time to halt further
tSDSU
16
tCLK
conversions
START pin low or STOP opcode hold time to complete current
tDSHD
16
tCLK
conversion (gate mode)
tPWH, L
START pin pulse width high, low
4
tCLK
tSTDR
START pin rising edge to DRDY rising edge
4
tCLK
Copyright
2009–2011, Texas Instruments Incorporated
23
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADS1259EVM | 制造商:Texas Instruments 功能描述:DEVELOPMENT TOOL |
| ADS1259EVM-PDK | 功能描述:数据转换 IC 开发工具 ADS1259 Perf Demo Kit RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V |
| ADS1259EVM-PDK | 制造商:Texas Instruments 功能描述:DEVELOPMENT TOOL |
| ADS1259IPW | 功能描述:模数转换器 - ADC Low-Noise 14kSPS 24B ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| ADS1259IPW | 制造商:Texas Instruments 功能描述:A/D CONVERTER (A-D) IC |
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