- 您现在的位置：买卖IC网 > PDF目录19382 > ADSP-2188NKSTZ-320 (Analog Devices Inc)IC DSP CONTROLLER 16BIT 100LQFP PDF资料下载
参数资料
| 型号： | ADSP-2188NKSTZ-320 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 44/48页 |
| 文件大小： | 0K |
| 描述： | IC DSP CONTROLLER 16BIT 100LQFP |
| 标准包装： | 1 |
| 系列： | ADSP-21xx |
| 类型： | 定点 |
| 接口： | 主机接口，串行端口 |
| 时钟速率： | 80MHz |
| 非易失内存： | 外部 |
| 芯片上RAM： | 256kB |
| 电压 - 输入/输出： | 1.8V，2.5V，3.3V |
| 电压 - 核心： | 1.80V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-LQFP |
| 供应商设备封装： | 100-LQFP（14x14） |
| 包装： | 托盘 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页当前第44页第45页第46页第47页第48页
ADSP-218xN
Rev. A
|
Page 5 of 48
|
August 2006
MODES OF OPERATION
The ADSP-218xN series modes of operation appear in Table 2.
Setting Memory Mode
Memory Mode selection for the ADSP-218xN series is made
during chip reset through the use of the Mode C pin. This pin is
multiplexed with the DSP’s PF2 pin, so care must be taken in
how the mode selection is made. The two methods for selecting
the value of Mode C are active and passive.
Passive Configuration
Passive Configuration involves the use of a pull-up or pull-
down resistor connected to the Mode C pin. To minimize power
consumption, or if the PF2 pin is to be used as an output in the
DSP application, a weak pull-up or pull-down resistance, on the
order of 10 kΩ, can be used. This value should be sufficient to
pull the pin to the desired level and still allow the pin to operate
as a programmable flag output without undue strain on the pro-
cessor’s output driver. For minimum power consumption
during power-down, reconfigure PF2 to be an input, as the pull-
up or pull-down resistance will hold the pin in a known state,
and will not switch.
Active Configuration
Active Configuration involves the use of a three-statable exter-
nal driver connected to the Mode C pin. A driver’s output
enable should be connected to the DSP’s RESET signal such that
it only drives the PF2 pin when RESET is active (low). When
RESET is deasserted, the driver should be three-state, thus
allowing full use of the PF2 pin as either an input or output. To
minimize power consumption during power-down, configure
the programmable flag as an output when connected to a three-
stated buffer. This ensures that the pin will be held at a constant
level, and will not oscillate should the three-state driver’s level
hover around the logic switching point.
IDMA ACK Configuration
Mode D = 0 and in host mode: IACK is an active, driven signal
and cannot be “wire-OR’ed.” Mode D = 1 and in host mode:
IACK is an open drain and requires an external pull-down, but
multiple IACK pins can be “wire-OR’ed” together.
INTERRUPTS
The interrupt controller allows the processor to respond to the
eleven possible interrupts and reset with minimum overhead.
ADSP-218xN series members provide four dedicated external
interrupt input pins: IRQ2, IRQL0, IRQL1, and IRQE (shared
with the PF7–4 pins). In addition, SPORT1 may be reconfig-
ured for IRQ0, IRQ1, FI, and FO, for a total of six external
interrupts. The ADSP-218xN also supports internal interrupts
from the timer, the byte DMA port, the two serial ports, soft-
ware, and the power-down control circuit. The interrupt levels
are internally prioritized and individually maskable (except
power-down and reset). The IRQ2, IRQ0, and IRQ1 input pins
can be programmed to be either level- or edge-sensitive. IRQL0
and IRQL1 are level-sensitive and IRQE is edge-sensitive. The
priorities and vector addresses of all interrupts are shown in
Table 2. Modes of Operation
Mode D
Mode C
Mode B
Mode A
Booting Method
X
0
BDMA feature is used to load the first 32 program memory words from the byte memory
space. Program execution is held off until all 32 words have been loaded. Chip is
configured in Full Memory Mode.1
X
0
1
0
No automatic boot operations occur. Program execution starts at external memory
location 0. Chip is configured in Full Memory Mode. BDMA can still be used, but the
processor does not automatically use or wait for these operations.
0
1
0
BDMA feature is used to load the first 32 program memory words from the byte memory
space. Program execution is held off until all 32 words have been loaded. Chip is
configured in Host Mode. IACK has active pull-down. (Requires additonal hardware.)
0
1
0
1
IDMA feature is used to load any internal memory as desired. Program execution is held
off until the host writes to internal program memory location 0. Chip is configured in
Host Mode. IACK has active pull-down.
1
0
BDMA feature is used to load the first 32 program memory words from the byte memory
space. Program execution is held off until all 32 words have been loaded. Chip is
configured in Host Mode; IACK requires external pull-down. (Requires additonal
hardware.)
1
0
1
IDMA feature is used to load any internal memory as desired. Program execution is held
off until the host writes to internal program memory location 0. Chip is configured in
Host Mode. IACK requires external pull-down.1
1 Considered as standard operating settings. Using these configurations allows for easier design and better memory management.
相关PDF资料 |
PDF描述 |
|---|---|
| VI-2WF-CY-F3 | CONVERTER MOD DC/DC 72V 50W |
| RCM08DTBD-S189 | CONN EDGECARD 16POS R/A .156 SLD |
| VI-2WB-CY-F1 | CONVERTER MOD DC/DC 95V 50W |
| MIC3232YMM | IC LED DRVR HP CONS CURR 10-MSOP |
| 1130-561K-RC | CHOKE RF HI CURR 560UH 10% RAD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADSP-2188NKSTZ-3202 | 制造商:AD 制造商全称:Analog Devices 功能描述:DSP Microcomputer |
| ADSP-2188N-WFA | 制造商:Analog Devices 功能描述: |
| ADSP-2189 | 制造商:AD 制造商全称:Analog Devices 功能描述:DSP Microcomputer |
| ADSP-2189M | 制造商:AD 制造商全称:Analog Devices 功能描述:DSP Microcomputer |
| ADSP-2189M_99 | 制造商:AD 制造商全称:Analog Devices 功能描述:DSP Microcomputer |
发布紧急采购，3分钟左右您将得到回复。