参数资料
| 型号： | ADT7467BBZEVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 21/72页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR ADT7467 |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi |
| 标准包装： | 1 |
| 系列： | dBCool® |
| 传感器类型： | 温度 |
| 传感范围： | -40°C ~ 120°C |
| 接口： | SMBus（2 线/I²C） |
| 灵敏度： | ±1.5°C |
| 电源电压： | 3 V ~ 5.5 V |
| 嵌入式： | 否 |
| 已供物品： | 板，缆线，CD |
| 已用 IC / 零件： | ADT7467 |
| 其它名称： | EVAL-ADT7467EBZ EVAL-ADT7467EBZ-ND |
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ADT7467
Table 24. CONFIGURING PIN 9
Bit 1 Bit 0
0 0
Function
TACH4
counting on the next THERM assertion. The THERM timer
continues to accumulate THERM assertion times until the
timer is read (it is cleared upon a read) or until it reaches full
scale. If the counter reaches full scale, it stops at that reading
0
1
1
1
0
1
THERM
SMBALERT
GPIO
until cleared.
The 8-bit THERM timer register (0x79) is designed such
that Bit 0 is set to 1 upo n the first THERM assertion. Once
the cumulative THERM assertion time exceeds 45.52 ms,
Once Pin 9 is configured as THERM, it must be enabled
(Bit 1, Configuration Register 3 at Address 0x78).
THERM as an Input
When THERM is configured as an input, the user can time
assertions on the THERM pin. This can be useful for
connecting to the PROCHOT output of a CPU to gauge
system performance.
The user can also set up the ADT7467 so that when the
THERM pin is driven low externally, the fans run at 100%.
The fans run at 100% for the duration of the time that the
THERM pin is pulled low. This is done by setting the
BOOST bit (Bit 2) in Configuration Register 3 (0x78) to 1.
This only works if the fan is already running, for example,
in manual mode when the current duty cycle is above 0x00,
or in automatic mode when the temperature is above T MIN .
If the temperature is below T MIN or if the duty cycle in
manual mode is set to 0x00, externally pulling THERM low
has no effect. See Figure 29 for more information.
T MIN
Bit 1 of the THERM timer is set and Bit 0 becomes the LSB
of the timer with a resolution of 22.76 ms (see Figure 30).
It is important to be aware of the following when using the
THERM timer.
After a THERM timer is read (Register 0x79), the
following occurs:
? The contents of the timer are cleared upon a read.
? The F4P bit (Bit 5) of Interrupt Status Register 2 must
be cleared, assuming that the THERM timer limit has
been exceeded.
If the THERM timer is read during a THERM assertion,
the following occurs:
? The contents of the timer are cleared.
? Bit 0 of the THERM timer is set to 1 because a
THERM assertion is occurring.
? The THERM timer increments from 0.
? If the THERM timer limit (Register 0x7A) is 0x00, the
F4P bit is set.
THERM
THERM
0 0 0 0 0 0 0 1
THERM
TIMER
(REG. 0x79)
7 6 5 4 3 2 1 0
THERM ASSERTED
? 22.76 ms
THERM
THERM Asserted to LOW as an Input:
Fans Do Not Go to 100% Because
ACCUMULATE THERM LOW
ASSERTION TIMES
Temperature is Below T MIN
THERM Asserted to LOW as an Input:
Fans Do Not Go to 100% Because
Temperature is Above T MIN and Fans
are Already Running
Figure 29. Asserting THERM Low as an Input in
THERM
TIMER
(REG. 0x79)
THERM
0 0 0 0 0 0 1 0
7 6 5 4 3 2 1 0
THERM ASSERTED
? 45.52 ms
Automatic Fan Speed Control Mode
THERM ASSERTED
THERM Timer
The ADT7467 has an internal timer to measure THERM
assertion time. For example, the THERM input can be
connected to the PROCHOT output of a Pentium ? 4 CPU to
measure system performance. The THERM input can also
be connected to the output of a trip point temperature sensor.
The timer is started on the assertion of the THERM input
and stopped when THERM is deasserted. The timer counts
ACCUMULATE THERM LOW
ASSERTION TIMES
THERM 0 0 0 0 0 1 0 1
TIMER 7 6 5 4 3 2 1 0
(REG. 0x79)
? 113.8 ms
(91.04 ms + 22.76 ms)
Figure 30. Understanding the THERM Timer
THERM times cumulatively, that is, the timer resumes
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