参数资料
| 型号： | ADT7475EBZEVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 34/58页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR ADT7475 |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi |
| 标准包装： | 1 |
| 系列： | dBCool® |
| 类型： | 温度传感器 |
| 适用于相关产品： | ADT7475 |
| 所含物品： | 评估板 |
| 其它名称： | EVAL-ADT7475EB EVAL-ADT7475EB-ND |
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ADT7475
40% duty cycle. Note that both fans turn on at exactly the
same temperature, defined by T MIN .
Programming the PWM MIN Registers
The PWM MIN registers are 8-bit registers that allow the
minimum PWM duty cycle for each output to be configured
anywhere from 0% to 100%. This allows the minimum
PWM duty cycle to be set in steps of 0.39%.
The value to be programmed into the PWM MIN register is
given by:
100%
PWM MAX
PWM MIN
0%
Value (decimal) = PWM MIN /0.39
T MIN
TEMPERATURE
Example 1
For a minimum PWM duty cycle of 50%,
Value (decimal) = 50/0.39 = 128 (decimal)
Value = 128 (decimal) or 80 (hex)
Example 2
For a minimum PWM duty cycle of 33%,
Value (decimal) = 33/0.39 = 85 (decimal)
Value = 85 (decimal) or 54 (hex)
Table 41. PWM MIN REGISTERS
Figure 51. PWM MAX Determines Maximum PWM Duty
Cycle Below the THERM Temperature Limit
Programming the PWM MAX Registers
The PWM MAX registers are 8-bit registers that allow the
maximum PWM duty cycle for each output to be configured
anywhere from 0% to 100%. This allows the maximum
PWM duty cycle to be set in steps of 0.39%.
The value to be programmed into the PWM MAX register
is given by:
Value (decimal) = PWM MAX /0.39
Register
0x64
0x65
0x66
Description
PWM1 Minimum Duty Cycle
PWM2 Minimum Duty Cycle
PWM3 Minimum Duty Cycle
Default
0x80 (50%)
0x80 (50%)
0x80 (50%)
Example 1
For a maximum PWM duty cycle of 50%,
Value (decimal) ? 50/0.39 = 128 (decimal)
Value = 128 (decimal) or 80 (hex)
Note on Fan Speed and PWM Duty Cycle
The PWM duty cycle does not directly correlate to fan
speed in RPM. Running a fan at 33% PWM duty cycle does
not equate to running the fan at 33% speed. Driving a fan at
33% PWM duty cycle actually runs the fan at closer to 50%
Example 2
For a minimum PWM duty cycle of 75%,
Value (decimal) = 75/0.39 = 192 (decimal)
Value = 192 (decimal) or C0 (hex)
of its full speed. This is because fan speed in %RPM
generally relates to the square root of the PWM duty cycle.
Given a PWM square wave as the drive signal, fan speed in
RPM approximates to:
Table 42. PWM MAX REGISTERS
Register Description
0x38 PWM1 Maximum Duty Cycle
Default
0xFF (100%)
% fanspeed + PWM duty cycle
10
(eq. 4)
0x39
0x3A
PWM2 Maximum Duty Cycle
PWM3 Maximum Duty Cycle
0xFF (100%)
0xFF (100%)
Step 5: PWM MAX for PWM (Fan) Outputs
PWM MAX is the maximum duty cycle that each fan in the
system runs at under the automatic fan speed control loop.
For maximum system acoustic benefit, PWM MAX should be
as low as possible but should be capable of maintaining the
processo r temperature limit at an acceptable level. If the
THERM temperature limit is exceeded, the fans are still
boosted to 100% for fail-safe cooling.
There is a PWM MAX limit for each fan channel. The
default value of all PWM MAX registers is 0xFF.
Step 6: T RANGE for Temperature Channels
T RANGE is the range of temperature over which automatic
fan control occurs once the programmed T MIN temperature
has been exceeded. T RANGE is the temperature range
between PWM MIN and 100% PWM where the fan speed
changes linearly. Otherwise stated, it is the line drawn
between the T MIN /PWM MIN and the (T MIN + T RANGE )
/PWM 100% intersection points.
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