参数资料
型号: ADUC7021BCPZ62-RL
厂商: Analog Devices Inc
文件页数: 56/104页
文件大小: 0K
描述: IC MCU 12BIT 1MSPS UART 40-LFCSP
标准包装: 2,500
系列: MicroConverter® ADuC7xxx
核心处理器: ARM7
芯体尺寸: 16/32-位
速度: 44MHz
连通性: EBI/EMI,I²C,SPI,UART/USART
外围设备: PLA,PWM,PSM,温度传感器,WDT
输入/输出数: 13
程序存储器容量: 64KB(32K x 16)
程序存储器类型: 闪存
RAM 容量: 2K x 32
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 3.6 V
数据转换器: A/D 8x12b,D/A 2x12b
振荡器型: 内部
工作温度: -40°C ~ 125°C
封装/外壳: 40-VFQFN 裸露焊盘,CSP
包装: 带卷 (TR)
Data Sheet
ADuC7019/20/21/22/24/25/26/27/28/29
Rev. F | Page 55 of 104
Reset Operation
There are four kinds of reset: external, power-on, watchdog
expiration, and software force. The RSTSTA register indicates
the source of the last reset, and RSTCLR allows clearing of the
RSTSTA register. These registers can be used during a reset
exception service routine to identify the source of the reset.
If RSTSTA is null, the reset is external.
Table 44. REMAP Register
Name
Address
Default Value
Access
REMAP
0xFFFF0220
0xXX1
R/W
1
Depends on the model.
Table 45. REMAP MMR Bit Designations
Bit
Name
Description
4
Read-only bit. Indicates the size of the Flash/EE
memory available. If this bit is set, only 32 kB of
Flash/EE memory is available.
3
Read-only bit. Indicates the size of the SRAM
memory available. If this bit is set, only 4 kB of
SRAM is available.
2:1
Reserved.
0
Remap
Remap bit. Set by user to remap the SRAM to
Address 0x00000000. Cleared automatically
after reset to remap the Flash/EE memory to
Address 0x00000000.
Table 46. RSTSTA Register
Name
Address
Default Value
Access
RSTSTA
0xFFFF0230
0x01
R/W
Table 47. RSTSTA MMR Bit Designations
Bit
Description
7:3
Reserved.
2
Software reset. Set by user to force a software reset.
Cleared by setting the corresponding bit in RSTCLR.
1
Watchdog timeout. Set automatically when a watchdog
timeout occurs. Cleared by setting the corresponding
bit in RSTCLR.
0
Power-on reset. Set automatically when a power-on
reset occurs. Cleared by setting the corresponding bit
in RSTCLR.
Table 48. RSTCLR Register
Name
Address
Default Value
Access
RSTCLR
0xFFFF0234
0x00
W
Note that to clear the RSTSTA register, the user must write 0x07
to the RSTCLR register.
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