参数资料
型号: ADV3227ACPZ
厂商: Analog Devices Inc
文件页数: 1/24页
文件大小: 0K
描述: IC CROSSPOINT SW 16X16 100LFCSP
标准包装: 1
功能: 交叉点开关
电路: 1 x 16:16
电压电源: 双电源
电压 - 电源,单路/双路(±): ±5V
电流 - 电源: 125mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 100-VFQFN 裸露焊盘,CSP
供应商设备封装: 100ピンLFCSP-VQ(12x12)
包装: 管件
750 MHz, 16 × 16
Analog Crosspoint Switch
ADV3226/ADV3227
Rev. 0
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responsibilityis assumedbyAnalog Devices foritsuse,nor for anyinfringements ofpatents orother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2010 Analog Devices, Inc. All rights reserved.
FEATURES
16 × 16 high speed, nonblocking switch array
Pinout and functionally equivalent to the AD8114/AD8115
Complete solution
Buffered inputs
Programmable high impedance outputs
16 output amplifiers, G = +1 (ADV3226), G = +2 (ADV3227)
Drives 150 Ω loads
Operates on ±5 V supplies
Low power: 1.3 W
Excellent ac performance
3 dB bandwidth
200 mV p-p: 820 MHz (ADV3226), 750 MHz (ADV3227)
2 V p-p: 600 MHz (ADV3226), 750 MHz (ADV3227)
Slew rate: 2150 V/μs (ADV3226), 2950 V/μs (ADV3227)
Serial or parallel programming of switch array
100-lead LFCSP (12 mm × 12 mm)
APPLICATIONS
Routing of high speed signals including
Video (NTSC, PAL, S, SECAM, YUV, RGB)
Compressed video (MPEG, wavelet)
3-level digital video (HDB3)
Data communications
Telecommunications
GENERAL DESCRIPTION
The ADV3226/ADV3227 are high speed 16 × 16 analog crosspoint
switch matrices. They offer a 3 dB signal bandwidth greater
than 750 MHz and channel switch times of less than 20 ns with
1% settling.
The ADV3226/ADV3227 include 16 independent output buffers
that can be placed into a high impedance state for paralleling
crosspoint outputs to prevent off channels from loading the
output bus. The ADV3226 has a gain of +1 and the ADV3227
has a gain of +2. They both operate on voltage supplies of ±5 V
FUNCTIONAL BLOCK DIAGRAM
SER/PAR D0 D1 D2 D3
ADV3226/
ADV3227
80
256
80-BIT SHIFT REGISTER
WITH 5-BIT
PARALLEL LOADING
PARALLEL LATCH
DECODE
16 × 5:16 DECODERS
16
CLK
DATAIN
UPDATE
CE
RESET
A0
DATAOUT
16
OU
T
P
U
T
S
16
IN
P
U
T
S
A1
A2
D4
A3
SWITCH
MATRIX
SET INDIVIDUAL
OR RESET ALL
OUTPUTS TO OFF
OUTPUT
BUFFER
G = +1,
G = +2
08653-
001
Figure 1.
while consuming only 118 mA (ADV3226) and 133 mA
(ADV3227) of idle current. Channel switching is performed via
a serial digital control that can accommodate daisy chaining of
several devices or via a parallel control to allow updating of an
individual output without reprogramming the entire array.
The ADV3226/ADV3227 are available in the 100-lead LFCSP
package over the extended industrial temperature range of
40°C to +85°C.
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