参数资料
| 型号： | ADV601LCJSTZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 8/44页 |
| 文件大小： | 0K |
| 描述： | IC CODEC VIDEO DSP/SRL 120LQFP |
| 标准包装： | 1 |
| 类型： | 视频编解码器 |
| 数据接口： | DSP，串行 |
| 分辨率（位）： | 8 b |
| 三角积分调变： | 无 |
| 电压 - 电源，模拟： | 4.5 V ~ 5.5 V |
| 电压 - 电源，数字： | 4.5 V ~ 5.5 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 120-LQFP |
| 供应商设备封装： | 120-LQFP（14x14） |
| 包装： | 托盘 |
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ADV601LC
–16–
REV. 0
PIN FUNCTION DESCRIPTIONS
Clock Pins
Name
Pins
I/O
Description
VCLK/XTAL
2
I
A single clock (VCLK) or crystal input (across VCLK and XTAL). An acceptable
50% duty cycle clock signal is 27 MHz (CCIR-601 NTSC/PAL).
If using a clock crystal, use a parallel resonant, microprocessor grade clock crystal. If
using a clock input, use a TTL level input, 50% duty cycle clock with 1 ns (or less)
jitter (measured rising edge to rising edge). Slowly varying, low jitter clocks are
acceptable; up to 5% frequency variation in 0.5 sec.
VCLKO
1
O
VCLK Output or VCLK Output divided by two. Select function using Mode
Control register.
Video Interface Pins
Name
Pins
I/O
Description
VSYNC
1
I or O
Vertical Sync or Vertical Blank. This pin can be either an output (Master Mode) or
an input (Slave Mode). The pin operates as follows:
Output (Master) HI during inactive lines of video and LO otherwise
Input (Slave) a HI on this input indicates inactive lines of video
HSYNC
1
I or O
Horizontal Sync or Horizontal Blank. This pin can be either an output (Master
Mode) or an input (Slave Mode). The pin operates as follows:
Output (Master) HI during inactive portion of video line and LO otherwise
Input (Slave) a HI on this input indicates inactive portion of video line
Note that the polarity of this signal is modified using the Mode Control register. For
detailed timing information, see the Video Interface section.
FIELD
1
I or O
Field # or Frame Sync. This pin can be either an output (Master Mode) or an input
(Slave Mode). The pin operates as follows:
Output (Master) HI during Field1 lines of video and LO otherwise
Input (Slave) a HI on this input indicates Field1 lines of video
ENC
1
O
Encode or Decode. This output pin indicates the coding mode of the ADV601LC
and operates as follows:
LO Decode Mode (Video Interface is output)
HI Encode Mode (Video Interface is input)
Note that this pin can be used to control bus enable pins for devices connected to
the ADV601LC Video Interface.
VDATA[7:0]
8
I/O
4:2:2 Video Data (8-bit digital component video data). These pins are inputs during
encode mode and outputs during decode mode. When outputs (decode) these pins
are compatible with 50 pF loads (rather than 30 pF as all other busses) to meet the
high performance and large number of typical loads on this bus.
The performance of these pins varies with the Video Interface Mode set in the
Mode Control register, see the Video Interface section of this data sheet for pin
assignments in each mode.
Note that the Mode Control register also sets whether the color component is
treated as either signed or unsigned.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADV601LCJSTZRL | 功能描述:IC CODEC VIDEO DSP/SRL 120LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 编解码器 系列:- 标准包装:2,500 系列:- 类型:立体声音频 数据接口:串行 分辨率（位）:18 b ADC / DAC 数量:2 / 2 三角积分调变:是 S/N 比，标准 ADC / DAC (db):81.5 / 88 动态范围，标准 ADC / DAC (db):82 / 87.5 电压 - 电源，模拟:2.6 V ~ 3.3 V 电压 - 电源，数字:1.7 V ~ 3.3 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-WFQFN 裸露焊盘 供应商设备封装:48-TQFN-EP（7x7） 包装:带卷 (TR) |
| ADV601LC-VIDEOPIPE | 制造商:Analog Devices 功能描述:TOOLS:DEVELOPMENT BOARDS H/W 制造商:Analog Devices 功能描述:EVALUATION BOARD ((NS)) |
| ADV601XS | 制造商:Analog Devices 功能描述: |
| ADV611 | 制造商:AD 制造商全称:Analog Devices 功能描述:CLOSED CIRCUIT TV DIGITAL VIDEO CODEC |
| ADV611JST | 制造商:Analog Devices 功能描述:Video Compression 120-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:CLOSED CIRCUIT TV VIDEO CODEC - TQFP PKG - Tape and Reel |
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