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参数资料
型号： AM29DL162CB120ZEN
厂商： SPANSION LLC
元件分类： PROM
英文描述： 1M X 16 FLASH 3V PROM, 120 ns, PDSO56
封装： SSOP-56
文件页数： 45/55页
文件大小： 775K
代理商： AM29DL162CB120ZEN
September 7, 2007 21533C2
Am29DL16xC
3
D A TA
SH EE T
TABLE OF CONTENTS
Distinctive Characteristics . . . . . . . . . . . . . . . . . . 1
General Description . . . . . . . . . . . . . . . . . . . . . . . . 2
Simultaneous Read/Write Operations with Zero Latency ......... 2
Am29DL16xC Features ............................................................ 2
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5
Special Handling Instructions for FBGA Package ..................... 6
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 10
Table 1. Am29DL16xC Device Bus Operations ..............................10
Requirements for Reading Array Data ................................... 10
Writing Commands/Command Sequences ............................ 11
Simultaneous Read/Write Operations with Zero Latency ....... 11
Automatic Sleep Mode ........................................................... 11
RESET#: Hardware Reset Pin ............................................... 12
Output Disable Mode .............................................................. 12
Table 2. Am29DL16xC Device Bank Divisions ...............................12
Table 3. Sector Addresses for Top Boot Sector Devices ................13
SecSi Sector Addresses for Top Boot Devices.............................. 13
Table 5. Sector Addresses for Bottom Boot Sector Devices ...........14
SecSi Sector Addresses for Bottom Boot Devices......................... 14
Table 7. Am29DL16xC Autoselect Codes, (High Voltage Method) 15
Table 8. Top Boot Sector/Sector Block Addresses for
Protection/Unprotection ...................................................................16
Table 9. Bottom Boot Sector/Sector Block Addresses for Protec-
tion/Unprotection .............................................................................16
Write Protect (WP#) ................................................................ 17
Temporary Sector/Sector Block Unprotect ............................. 17
Figure 1. Temporary Sector Unprotect Operation........................... 17
Figure 2. In-System Sector/Sector Block Protect and
Unprotect Algorithms....................................................................... 18
SecSi (Secured Silicon) Sector Flash Memory Region .......... 19
Hardware Data Protection ...................................................... 19
Common Flash Memory Interface (CFI) . . . . . . . 20
Table 10. CFI Query Identification String ........................................ 20
System Interface String................................................................... 21
Table 12. Device Geometry Definition ............................................ 21
Table 13. Primary Vendor-Specific Extended Query ...................... 22
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 23
Reading Array Data ................................................................ 23
Reset Command ..................................................................... 23
Autoselect Command Sequence ............................................ 23
Enter SecSi Sector/Exit SecSi Sector Command Sequence .. 24
Byte/Word Program Command Sequence ............................. 24
Figure 3. Program Operation .......................................................... 25
Chip Erase Command Sequence ........................................... 25
Sector Erase Command Sequence ........................................ 25
Erase Suspend/Erase Resume Commands ........................... 26
Figure 4. Erase Operation............................................................... 26
Table 14. Am29DL16xC Command Definitions .............................. 27
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 28
DQ7: Data# Polling ................................................................. 28
Figure 5. Data# Polling Algorithm ................................................... 28
DQ6: Toggle Bit I .................................................................... 29
Figure 6. Toggle Bit Algorithm........................................................ 29
DQ2: Toggle Bit II ................................................................... 30
Reading Toggle Bits DQ6/DQ2 ............................................... 30
DQ5: Exceeded Timing Limits ................................................ 30
DQ3: Sector Erase Timer ....................................................... 30
Table 15. Write Operation Status ................................................... 31
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 32
Figure 7. Maximum Negative Overshoot Waveform ...................... 32
Figure 8. Maximum Positive Overshoot Waveform........................ 32
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 9. ICC1 Current vs. Time (Showing Active and
Automatic Sleep Currents) ............................................................. 34
Figure 10. Typical I
CC1 vs. Frequency ............................................ 34
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 11. Test Setup.................................................................... 35
Figure 12. Input Waveforms and Measurement Levels ................. 35
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 13. Read Operation Timings ............................................... 36
Figure 14. Reset Timings ............................................................... 37
Word/Byte Configuration (BYTE#) .......................................... 38
Figure 15. BYTE# Timings for Read Operations............................ 38
Figure 16. BYTE# Timings for Write Operations............................ 38
Erase and Program Operations .............................................. 39
Figure 17. Program Operation Timings.......................................... 40
Figure 18. Accelerated Program Timing Diagram.......................... 40
Figure 19. Chip/Sector Erase Operation Timings .......................... 41
Figure 20. Back-to-back Read/Write Cycle Timings ...................... 42
Figure 21. Data# Polling Timings (During Embedded Algorithms). 42
Figure 22. Toggle Bit Timings (During Embedded Algorithms)...... 43
Figure 23. DQ2 vs. DQ6................................................................. 43
Temporary Sector/Sector Block Unprotect ............................. 44
Figure 24. Temporary Sector/Sector Block Unprotect
Timing Diagram.............................................................................. 44
Figure 25. Sector/Sector Block Protect and Unprotect
Timing Diagram.............................................................................. 45
Alternate CE# Controlled Erase and Program Operations ..... 46
Figure 26. Alternate CE# Controlled Write (Erase/Program)
Operation Timings.......................................................................... 47
Erase And Programming Performance . . . . . . . 48
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 48
TSOP And SO Pin Capacitance . . . . . . . . . . . . . . 48
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 49
SSO056—56-Pin Shrink Small Outline Package (SSOP)
(measured in millimeters) ....................................................... 49
FBC048—48-Ball Fine-Pitch Ball Grid Array (FBGA)
8 x 9 mm (measured in millimeters) ........................................ 50
TS 048—48-Pin Standard TSOP (measured in millimeters) .. 51
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 52
Revision B .............................................................................. 52
Revision B+1 .......................................................................... 52
Revision C .............................................................................. 52
Revision C1 (May 8, 2006) ..................................................... 52
Revision C2 (September 7, 2007) .......................................... 52
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