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参数资料
| 型号： | AM29PDL127H85VKI |
| 厂商： | Spansion Inc. |
| 英文描述： | 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Page Mode Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control |
| 中文描述： | 128兆位（8米× 16位），3.0伏的CMOS只，页面模式同步读/写闪存与增强VersatileIO控制记忆 |
| 文件页数： | 50/68页 |
| 文件大小： | 750K |
| 代理商： | AM29PDL127H85VKI |
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52
Am29PDL127H
June 30, 2003
ADV ANCE
I N FO RMAT I O N
AC CHARACTERISTICS
Erase and Program Operations
Notes:
1. Not 100% tested.
2. See the “Erase And Programming Performance” section for more information.
Parameter
Speed Options
JEDEC
Std
Description
53
63, 68
83, 88
Unit
t
AVAV
t
WC
Write Cycle Time (Note 1)
Min
55
65
85
ns
t
AVWL
t
AS
Address Setup Time
Min
0
ns
t
ASO
Address Setup Time to OE# low during toggle bit polling
Min
15
ns
t
WLAX
t
AH
Address Hold Time
Min
30
35
ns
t
AHT
Address Hold Time From CE# or OE# high
during toggle bit polling
Min
0
ns
t
DVWH
t
DS
Data Setup Time
Min
25
30
ns
t
WHDX
t
DH
Data Hold Time
Min
0
ns
t
OEPH
Output Enable High during toggle bit polling
Min
10
ns
t
GHWL
t
GHWL
Read Recovery Time Before Write
(OE# High to WE# Low)
Min
0
ns
t
ELWL
t
CS
CE# Setup Time
Min
0
ns
t
WHEH
t
CH
CE# Hold Time
Min
0
ns
t
WLWH
t
WP
Write Pulse Width
Min
35
40
ns
t
WHDL
t
WPH
Write Pulse Width High
Min
20
25
ns
t
SR/W
Latency Between Read and Write Operations
Min
0
ns
t
WHWH1
t
WHWH1
Programming Operation (Note 2)
Typ
6
s
t
WHWH1
t
WHWH1
Accelerated Programming Operation (Note 2)
Typ
4
s
t
WHWH2
t
WHWH2
Sector Erase Operation (Note 2)
Typ
0.5
sec
t
VCS
V
CC Setup Time (Note 1)
Min
50
s
t
RB
Write Recovery Time from RY/BY#
Min
0
ns
t
BUSY
Program/Erase Valid to RY/BY# Delay
Max
90
ns
相关PDF资料 |
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