- 您现在的位置：买卖IC网 > PDF目录378403 > AN1406 (ON SEMICONDUCTOR) DESIGNING WITH PECL (ECL AT + 5.0) PDF资料下载
参数资料
| 型号： | AN1406 |
| 厂商： | ON SEMICONDUCTOR |
| 英文描述： | DESIGNING WITH PECL (ECL AT + 5.0) |
| 中文描述： | 具有PECL设计（ECL在5.0） |
| 文件页数： | 5/8页 |
| 文件大小： | 117K |
| 代理商： | AN1406 |
AN1406/D
http://onsemi.com
5
Parallel Termination Schemes
Because the techniques using an extra VTT power supply
consume significantly less power, as the number of PECL
devices incorporated in the design increases the more
attractive the VTT supply termination scheme becomes.
Typically ECL is specified driving 50
into a –2.0V,
therefore for PECL with a VCC supply different than ground
the VTT terminating voltage will be VCC – 2.0V. Ideally the
VTT supply would track 1:1 with VCC, however in theory
this scenario is highly unlikely. To ensure proper operation
of a PECL device within the system the tolerances of the VTT
and the VCC supplies should be considered. Assume for
instance that the nominal case is for a 50
load (Rt) into a
+3.0V supply; for a 10H compatible device with a VOHmax
of –0.81V and a realistic VOLmin of –1 .85V the following
can be derived:
IOHmax = (VOHmax – VTT)/Rt
IOHmax = ({5.0 – 0.81} – 3.0)/50 = 23.8mA
IOLmin = (VOLmin – VTT)/Rt
IOLmin = ({5.0 – 1.85} – 3.0)/50 = 3.0mA
If +5% supplies are assumed a VCC of VCCnom –5% and a
VTT of VTTnom +5% will represent the worst case. Under
these conditions, the following output currents will result:
IOHmax = ({4.75 – 0.81} – 3.15)/50 = 15.8mA
IOLmin = ({4.75 – 1.85} – 3.15)/50 = 0mA
Using the other extremes for the supply voltages yields:
IOHmax = 31.8mA
IOLmin = 11mA
The changes in the IOH currents will affect the DC VOH
levels by
≈±
40mV at the two extremes. However in the vast
majority of cases the DC levels for ECL devices are well
centered in their specification windows, thus this variation
will simply move the level within the valid specification
window and no loss of worst case noise margin will be seen.
The IOL situation on the other hand does pose a potential AC
problem. In the worst case situation the output emitter
follower could move into the cutoff state. The output emitter
followers of ECL devices are designed to be in the
conducting “on” state at all times. If cutoff, the delay of the
device will be increased due to the extra time required to pull
the output emitter follower out of the cutoff state. Again this
situation will arise only under a number of simultaneous
worst case situations and therefore is highly unlikely to
occur, but because of the potential it should not be
overlooked.
Thevenin Equivalent Termination Schemes
The Thevenin equivalent parallel termination technique
of Figure 3 is likely the most attractive scheme for the
CMOS/TTL designer who is using a small amount of ECL.
As mentioned earlier this technique will consume more
power, however the absence of an additional power supply
will more than compensate for the extra power
consumption. In addition, this extra power is consumed
entirely in the external resistors and thus will not affect the
reliability of the IC. As is the case with standard parallel
termination, the tolerances of the VTT and VCC supplies
should be addressed in the design phase. The following
equations provide a means of determining the two resistor
values and the resulting equivalent VTT terminating voltage.
R1 = R2 ({VCC – VTT}/{VTT – VEE})
R2 = ZO ({VCC – VEE}/{VCC – VTT})
VTT = VCC (R2/{R1 + R2})
For the typical setup:
VCC = 5.0V; VEE = GND; VTT = 3.0V; and ZO = 50
R2 = 50 ({5 – 0}/{5–3}) = 125
R1 = 125 ({5–3}/{3–0}) = 83.3
checking for VTT
VTT = 5 (125/{125 – 83.3}) = 3.0V
Figure 3. Termination Techniques for
ECL/PECL Devices
ZO
Open Line Termnation
Rpd
VEE
ZO
Series Termnation
Rpd
VEE
Rs
RS = ZO
ZO
Parallel Termnation
Rt
VTT
Rt = ZO
ZO
Thevenin Parallel Termnation
R2
VEE
VCC
R1
Because of the resistor divider network used to generate
VTT the variation in V will be intimately tied to the variation
in VCC. Differentiating the equation for VTT with respect to
VCC yields:
dVTT/dVCC = R2/(R1 + R2) dVCC
相关PDF资料 |
PDF描述 |
|---|---|
| AN1504 | Metastability and the ECLinPS Family |
| AN1504D | Metastability and the ECLinPS Family |
| AN1568 | Interfacing Between LVDS and ECL |
| AN1568D | Interfacing Between LVDS and ECL |
| AN1593 | LOW COST 1.0 A CURRENT SOURCE FOR BATTERY CHARGERS |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AN1406/D | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:DESIGNING WITH PECL (ECL AT + 5.0) |
| AN1406D | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:3.3V / 5V ECL 2-Input Differential XOR/XNOR |
| AN14-17A | 制造商:AN# - MILITARY 功能描述: |
| AN1431 | 制造商:PANASONIC 制造商全称:Panasonic Semiconductor 功能描述:Surface-mount Adjustable Output Shunt Regulator |
| AN1431M | 功能描述:IC VREF SHUNT ADJ TO-243 RoHS:是 类别:集成电路 (IC) >> PMIC - 电压基准 系列:- 产品培训模块:Voltage Reference Basics 标准包装:100 系列:- 基准类型:旁路，精度 输出电压:4.096V 容差:±0.075% 温度系数:50ppm/°C 输入电压:- 通道数:1 电流 - 阴极:1µA 电流 - 静态:- 电流 - 输出:10mA 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:管件 |
发布紧急采购，3分钟左右您将得到回复。