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参数资料
| 型号： | AN1406 |
| 厂商： | ON SEMICONDUCTOR |
| 英文描述： | DESIGNING WITH PECL (ECL AT + 5.0) |
| 中文描述： | 具有PECL设计（ECL在5.0） |
| 文件页数： | 7/8页 |
| 文件大小： | 117K |
| 代理商： | AN1406 |
AN1406/D
http://onsemi.com
7
Noise and Power Supply Distribution
Since ECL devices are top rail referenced it is imperative
that the VCC rail be kept as noise free and variation free as
possible. To minimize the VCC noise of a system liberal
bypassing techniques should be employed. Placing a bypass
capacitor of 0.01
μ
F to 0.1
μ
F on the VCC pin of every device
will help to ensure a noise free VCC supply. In addition when
using PECL in a system populated heavily with CMOS and
TTL logic the two power supply planes should be isolated
as much as possible. This technique will help to keep the
large current spike noise typically seen in CMOS and TTL
drivers from coupling into the ECL devices. The ideal
situation would be multiple power planes; two dedicated to
the PECL VCC and ground and the other two to the
CMOS/TTL VCC and ground. However if these extra planes
are not feasible due to board cost or board thickness
constraints common planes with divided subplanes can be
used (Figure 5 on page 8). In either case the planes or sub
planes should be connected to the system power via separate
paths. Use of separate pins of the board connectors is one
example of connecting to the system supplies.
For single supply translators or dual supply translators
which share common power pins the package pins should be
connected to the ECL VCC and ground planes to ensure the
noise introduced to the part through the power plane is
minimal. For translating devices with separate TTL and
ECL power supply pins, the pins should be tied to the
appropriate power planes.
Another concern is the interconnect between two cards
with separate connections to the VCC supply. If the two
boards are at the opposite extremes of the VCC tolerance,
with the driver being at the higher limit and the receiver at
the lower limit, there is potential for soft saturation of the
receiver input. Soft saturation will manifest itself as
degradation in AC performance. Although this scenario is
unlikely, again the potential should be examined. For
situations where this potential exists there are devices
available which are less susceptible to the saturation
problem. This variation in VCC between boards will also
lead to variations in the input switching references. This
variation will lead to switching references which are not
ideally centered in the input swing and cause rise/fall skew
within the receiving device. Obviously the later skew
problem can be eliminated by employing differential
interconnect between boards.
When using PECL to drive signals across a backplane,
situations may arise where the driver and the receiver are on
different power supplies. A potential problem exists if the
receiver is powered down independent of the driver.
Figure 6, on page 8, represents a generic driver/receiver
pair. A current path exists through the receiver’s VCC plane
when the receiver is powered–down and the driver is
powered–on, as shown in Figure 6. If the receiver has ESD
protection, the current will flow though the ESD diode to
VCC. If the receiver has NO ESD protection, the current will
flow through the input transistor and emitter–follower
base–collector junctions to VCC. The amount of current
flow, in either case, will be enough to damage both the driver
and receiver devices. Either of these situations could lead to
degradation of the reliability of the devices. Because
different devices have different ESD protection schemes,
and input architectures, the extent of the potential problem
will vary from device to device.
Another issue that arises in driving backplanes is
situations where the input signals to the receiver are lost and
present an open input condition. Many differential input
devices will become unstable in this situation, however,
most of the newer designs, and some of the older designs,
incorporate internal clamp circuitry to guarantee stable
outputs under open input conditions. All of the ECLinPS
(except for the E111), ECLinPS Lite, and H600 devices,
along with the MC10125, 10H125 and 10114 will maintain
stable outputs under open input conditions.
Conclusion
The use of ECL logic has always been surrounded by
clouds of misinformation; none of those clouds have been
thicker than the one concerning PECL. By breaking through
this cloud of misinformation the traditional CMOS/TTL
designers can approach system problems armed with a
complete set of tools. For areas within their designs which
require very high speed, the driving of long, low impedance
lines or the distribution of very low skew clocks, designers
can take advantage of the built in features of ECL. By
incorporating this ECL logic using PECL methodologies
this inclusion need not require the addition of more power
supplies to unnecessarily drive up the cost of their systems.
By following the simple guidelines presented here
CMOS/TTL designers can truly optimize their designs by
utilizing ECL logic in areas in which they are ideally suited.
Thus bringing to market products which offer the ultimate
in performance at the lowest possible cost.
相关PDF资料 |
PDF描述 |
|---|---|
| AN1504 | Metastability and the ECLinPS Family |
| AN1504D | Metastability and the ECLinPS Family |
| AN1568 | Interfacing Between LVDS and ECL |
| AN1568D | Interfacing Between LVDS and ECL |
| AN1593 | LOW COST 1.0 A CURRENT SOURCE FOR BATTERY CHARGERS |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AN1406/D | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:DESIGNING WITH PECL (ECL AT + 5.0) |
| AN1406D | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:3.3V / 5V ECL 2-Input Differential XOR/XNOR |
| AN14-17A | 制造商:AN# - MILITARY 功能描述: |
| AN1431 | 制造商:PANASONIC 制造商全称:Panasonic Semiconductor 功能描述:Surface-mount Adjustable Output Shunt Regulator |
| AN1431M | 功能描述:IC VREF SHUNT ADJ TO-243 RoHS:是 类别:集成电路 (IC) >> PMIC - 电压基准 系列:- 产品培训模块:Voltage Reference Basics 标准包装:100 系列:- 基准类型:旁路，精度 输出电压:4.096V 容差:±0.075% 温度系数:50ppm/°C 输入电压:- 通道数:1 电流 - 阴极:1µA 电流 - 静态:- 电流 - 输出:10mA 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:管件 |
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