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参数资料
型号： APA450-FGG484A
厂商： Microsemi SoC
文件页数： 85/178页
文件大小： 0K
描述： IC FPGA PROASIC+ 450K 484-FBGA
标准包装： 40
系列： ProASICPLUS
RAM 位总计： 110592
输入/输出数： 344
门数： 450000
电源电压： 2.375 V ~ 2.625 V
安装类型： 表面贴装
工作温度： -40°C ~ 125°C
封装/外壳： 484-BGA
供应商设备封装： 484-FPBGA（23x23）
ProASICPLUS Flash Family FPGAs
v5.9
4-7
Advance v0.6
(continued)
The "Calculating Typical Power Dissipation" section was updated.
2-28
The "Absolute Maximum Ratings*" section was updated.
2-31
The "Programming, Storage, and Operating Limits" section was updated.
2-31
The "Nominal Supply Voltages’ section was updated.
1-34
The "Recommended Operating Conditions" section was updated.
2-33
The "DC Electrical Specifications (VDDP = 2.5 V ±0.2V)" section was updated.
2-34
The "DC Electrical Specifications (VDDP = 3.3 V ±0.3 V and VDD = 2.5 V ±0.2 V) Applies to
Military Temperature and MIL-STD-883B Temperature Only" section was updated.
2-38
The "Synchronous Write and Read to the Same Location" section was updated.
2-61
The "Asynchronous Write and Synchronous Read to the Same Location" section was updated.
2-62
The "Asynchronous FIFO Read" section was updated.
2-67
The "Pin Description" section has been updated.
2-73
The "Recommended Design Practice for VPN/VPP" section is new.
2-74
The "100-Pin TQFP" section is new.
3-1
The "484-Pin FBGA" section is new.
3-45
Advance v0.5
The description for the VPN pin has changed.
2-74
Advance v0.4
The "Plastic Device Resources" section has been updated.
ii
Figure 2-9 ProASICPLUS JTAG Boundary Scan Test Logic Circuit and Figure 2-10 TAP
Controller State Diagram have been updated.
2-11
The "Tristate Buffer Delays" section has been updated.
2-42
The "Output Buffer Delays" section has been updated.
2-44
The "Input Buffer Delays" section has been updated.
2-46
The "Global Input Buffer Delays" section has been updated.
2-48
The "456-Pin PBGA" section has been updated.
3-22
The "676-Pin FBGA" section has been updated.
3-51
Advance v0.3
The "ProASICPLUS Product Profile" section has been changed.
i
The "Plastic Device Resources" section has been updated.
ii
The "ProASICPLUS I/O Power Supply Voltages" sectionhas been updated.
2-6
WDATA has ben changed to DI, and RDATA has been changed to DO to make them consistent
with the signal names found in the Macro Library Guide.
Figure 2-18 Example SRAM Block Diagrams and Figure 2-19 Basic FIFO Block Diagrams
have been updated.
2-22
and 2-23
The "Design Environment" section and Figure 2-23 Tristate Buffer Delays have been
updated.
2-25
and 2-42
The table in the "Package Thermal Characteristics" section has been updated.
2-27
The "Calculating Typical Power Dissipation" section is new.
2-28
The "Programming, Storage, and Operating Limits" section is new.
2-31
The "Nominal Supply Voltages’ section has been updated.
1-34
The "DC Electrical Specifications (VDDP = 2.5 V ±0.2V)" section was updated.
2-34
The "DC Electrical Specifications (VDDP = 3.3 V ±0.3 V and VDD = 2.5 V ±0.2 V) Applies to
Military Temperature and MIL-STD-883B Temperature Only" section was updated.
2-38
The "Recommended Operating Conditions" section was updated.
2-33
The "ProASICPLUS Clock Management System" section was updated.
2-10
Figure 2-11 PLL Block – Top-Level View and Detailed PLL Block Diagram was updated.
2-11
Figure 2-10 TAP Controller State Diagram is new.
2-9
Tables 5, 6, and 7 from Advanced v0.3 were removed.
Previous version
Changes in current version (v5.9)
Page
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相关代理商/技术参数
参数描述
APA450-FGG484I 功能描述:IC FPGA PROASIC+ 450K 484-FBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASICPLUS 产品培训模块:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色产品:Cyclone? IV FPGAs 标准包装:60 系列:CYCLONE® IV GX LAB/CLB数:9360 逻辑元件/单元数:149760 RAM 位总计:6635520 输入/输出数:270 门数:- 电源电压:1.16 V ~ 1.24 V 安装类型:表面贴装 工作温度:0°C ~ 85°C 封装/外壳:484-BGA 供应商设备封装:484-FBGA（23x23）
APA450-FGG484I-MOT 制造商:Microsemi Corporation 功能描述:
APA450-FGGB 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:ProASIC Flash Family FPGAs
APA450-FGGES 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:ProASIC Flash Family FPGAs
APA450-FGGI 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:ProASIC Flash Family FPGAs
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