参数资料
型号: APA600-FG676
厂商: Microsemi SoC
文件页数: 57/178页
文件大小: 0K
描述: IC FPGA PROASIC+ 600K 676-FBGA
标准包装: 40
系列: ProASICPLUS
RAM 位总计: 129024
输入/输出数: 454
门数: 600000
电源电压: 2.3 V ~ 2.7 V
安装类型: 表面贴装
工作温度: 0°C ~ 70°C
封装/外壳: 676-BGA
供应商设备封装: 676-FBGA(27x27)
ProASICPLUS Flash Family FPGAs
v5.9
2-5
Array Coordinates
During many place-and-route operations in Actel’s
Designer software tool, it is possible to set constraints
that require array coordinates.
Table 2-2 is provided as a reference. The array coordinates
are measured from the lower left (0,0). They can be used in
region constraints for specific groups of core cells, I/Os, and
RAM blocks. Wild cards are also allowed.
I/O and cell coordinates are used for placement
constraints. Two coordinate systems are needed because
there is not a one-to-one correspondence between I/O
cells and core cells. In addition, the I/O coordinate system
changes depending on the die/package combination.
Core cell coordinates start at the lower left corner
(represented as (1,1)) or at (1,5) if memory blocks are
present at the bottom. Memory coordinates use the
same system and are indicated in Table 2-2. The memory
coordinates for an APA1000 are illustrated in Figure 2-5.
For more information on how to use constraints, see the
Designer User’s Guide or online help for ProASICPLUS
software tools.
Table 2-2
Array Coordinates
Device
Logic Tile
Memory Rows
All
Min.
Max.
Bottom
Top
xy
x
y
Min.
Max.
APA075
1
96
32
(33,33) or (33, 35)
0,0
97, 37
APA150
1
128
48
(49,49) or (49, 51)
0,0
129, 53
APA300
1
5
128
68
(1,1) or (1,3)
(69,69) or (69, 71)
0,0
129, 73
APA450
1
5
192
68
(1,1) or (1,3)
(69,69) or (69, 71)
0,0
193, 73
APA600
1
5
224
100
(1,1) or (1,3)
(101,101) or (101, 103)
0,0
225, 105
APA750
1
5
256
132
(1,1) or (1,3)
(133,133) or (133, 135)
0,0
257, 137
APA1000
1
5
352
164
(1,1) or (1,3)
(165,165) or (165, 167)
0,0
353, 169
Figure 2-5 Core Cell Coordinates for the APA1000
(353,169)
(352,167)
(352,165)
(352,164)
(352,5)
(352,3)
(353,0)
(352,1)
(1,5)
(1,1)
(1,164)
(1,165)
(1,3)
(1,167)
(1,169)
(0,0)
Core
Memory
Blocks
Memory
Blocks
相关PDF资料
PDF描述
ASM44DSES-S243 CONN EDGECARD 88POS .156 EYELET
FMM22DSEF CONN EDGECARD 44POS .156 EYELET
APA600-FGG676 IC FPGA PROASIC+ 600K 676-FBGA
M1AFS600-1FGG484K IC FPGA 4MB FLASH 600K 484-FBGA
M1AFS600-1FG484K IC FPGA 4MB FLASH 600K 484-FBGA
相关代理商/技术参数
参数描述
APA600-FG676I 功能描述:IC FPGA PROASIC+ 600K 676-FBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:ProASICPLUS 标准包装:1 系列:ProASICPLUS LAB/CLB数:- 逻辑元件/单元数:- RAM 位总计:129024 输入/输出数:248 门数:600000 电源电压:2.3 V ~ 2.7 V 安装类型:表面贴装 工作温度:- 封装/外壳:352-BFCQFP,带拉杆 供应商设备封装:352-CQFP(75x75)
APA600-FG896A 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:Automotive-Grade ProASIC Flash Family FPGAs
APA600-FGB 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:ProASIC Flash Family FPGAs
APA600-FGES 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:ProASIC Flash Family FPGAs
APA600-FGG256 功能描述:IC FPGA PROASIC+ 600K 256-FBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:ProASICPLUS 产品培训模块:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色产品:Cyclone? IV FPGAs 标准包装:60 系列:CYCLONE® IV GX LAB/CLB数:9360 逻辑元件/单元数:149760 RAM 位总计:6635520 输入/输出数:270 门数:- 电源电压:1.16 V ~ 1.24 V 安装类型:表面贴装 工作温度:0°C ~ 85°C 封装/外壳:484-BGA 供应商设备封装:484-FBGA(23x23)