参数资料
型号: AT89C51CC01UA-RLRUM
厂商: Atmel
文件页数: 12/123页
文件大小: 0K
描述: IC 8051 MCU 32K FLASH 44-VQFP
产品培训模块: MCU Product Line Introduction
标准包装: 1,500
系列: AT89C CAN
核心处理器: 8051
芯体尺寸: 8-位
速度: 40MHz
连通性: CAN,UART/USART
外围设备: POR,PWM,WDT
输入/输出数: 34
程序存储器容量: 32KB(32K x 8)
程序存储器类型: 闪存
EEPROM 大小: 2K x 8
RAM 容量: 1.25K x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 5.5 V
数据转换器: A/D 8x10b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 44-LQFP
包装: 标准包装
配用: AT89OCD-01-ND - USB EMULATOR FOR AT8XC51 MCU
其它名称: AT89C51CC01UA-RLRUMDKR
2010 Microchip Technology Inc.
DS41303G-page 109
PIC18F2XK20/4XK20
9.4
INTCON Registers
The INTCON registers are readable and writable
registers, which contain various enable, priority and
flag bits.
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit. User software should ensure
the appropriate interrupt flag bits are clear
prior to enabling an interrupt. This feature
allows for software polling.
REGISTER 9-1:
INTCON: INTERRUPT CONTROL REGISTER
R/W-0
R/W-x
GIE/GIEH
PEIE/GIEL
TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
GIE/GIEH: Global Interrupt Enable bit
When IPEN = 0:
1
= Enables all unmasked interrupts
0
= Disables all interrupts including peripherals
When IPEN = 1:
1
= Enables all high priority interrupts
0
= Disables all interrupts including low priority.
bit 6
PEIE/GIEL: Peripheral Interrupt Enable bit
When IPEN = 0:
1
= Enables all unmasked peripheral interrupts
0
= Disables all peripheral interrupts
When IPEN = 1:
1
= Enables all low priority interrupts
0
= Disables all low priority interrupts
bit 5
TMR0IE: TMR0 Overflow Interrupt Enable bit
1
= Enables the TMR0 overflow interrupt
0
= Disables the TMR0 overflow interrupt
bit 4
INT0IE: INT0 External Interrupt Enable bit
1
= Enables the INT0 external interrupt
0
= Disables the INT0 external interrupt
bit 3
RBIE: RB Port Change Interrupt Enable bit(2)
1
= Enables the RB port change interrupt
0
= Disables the RB port change interrupt
bit 2
TMR0IF: TMR0 Overflow Interrupt Flag bit
1
= TMR0 register has overflowed (must be cleared by software)
0
= TMR0 register did not overflow
bit 1
INT0IF: INT0 External Interrupt Flag bit
1
= The INT0 external interrupt occurred (must be cleared by software)
0
= The INT0 external interrupt did not occur
bit 0
RBIF: RB Port Change Interrupt Flag bit(1)
1
= At least one of the RB<7:4> pins changed state (must be cleared by software)
0
= None of the RB<7:4> pins have changed state
Note
1:
A mismatch condition will continue to set the RBIF bit. Reading PORTB will end the
mismatch condition and allow the bit to be cleared.
2:
RB port change interrupts also require the individual pin IOCB enables.
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