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参数资料
型号： AT89LP428-20AU
厂商： Atmel
文件页数： 69/149页
文件大小： 0K
描述： MCU 8051 4K FLASH SPI 32TQFP
产品培训模块： MCU Product Line Introduction
标准包装： 250
系列： 89LP
核心处理器： 8051
芯体尺寸： 8-位
速度： 20MHz
连通性： SPI，UART/USART
外围设备： 欠压检测/复位，POR，PWM，WDT
输入/输出数： 30
程序存储器容量： 4KB（4K x 8）
程序存储器类型： 闪存
EEPROM 大小： 512 x 8
RAM 容量： 768 x 8
电压 - 电源 (Vcc/Vdd)： 2.4 V ~ 5.5 V
振荡器型： 内部
工作温度： -40°C ~ 85°C
封装/外壳： 32-TQFP
包装： 托盘
26
3654A–MICRO–8/09
AT89LP428/828
7.3
External Reset
The P3.6/RST pin can function as either an active-low reset input or as a digital general-
purpose I/O, P3.6. The Reset Pin Enable Fuse, when set to “1”, enables the external reset input
function on P3.6. (see “User Configuration Fuses” on page 121). When cleared, P3.6 may be
used as an input or output pin. When configured as a reset input, the pin must be held low for at
least two clock cycles to trigger the internal reset. The RST pin includes an on-chip pull-up resis-
tor tied to V
CC. The pull-up is disabled when the pin is configured as P3.6.
Note:
During a power-up sequence, the fuse selection is always overridden and therefore the pin will
always function as a reset input. An external circuit connected to this pin should not hold this
pin LOW during a power-on sequence if the pin is configured as a general I/O, as this will
keep the device in reset until the pin transitions high. After the power-up delay, this input will
function either as an external reset input or as a digital input as defined by the fuse bit. Only a
power-up reset will temporarily override the selection defined by the reset fuse bit. Other sources
of reset will not override the reset fuse bit. P3.6/RST also serves as the In-System Programming
(ISP) enable. ISP is enabled when the external reset pin is held low. When the reset pin is dis-
abled by the fuse, ISP may only be entered by pulling P3.6 low during power-up.
7.4
Watchdog Reset
When the Watchdog times out, it will generate an internal reset pulse lasting 16 clock cycles.
Watchdog reset will also set the WDTOVF flag in WDTCON. To prevent a Watchdog reset, the
watchdog reset sequence 1EH/E1H must be written to WDTRST before the Watchdog times
out. See “Programmable Watchdog Timer” on page 105 for details on the operation of the
Watchdog.
7.5
Software Reset
The CPU may generate an internal 16-clock cycle reset pulse by writing the software reset
sequence 5AH/A5H to the WDRST register. A software reset will set the SWRST bit in WDT-
CON. See “Software Reset” on page 106 for more information on software reset. Writing any
sequences other than 5AH/A5H or 1EH/E1H to WDTRST will generate an immediate reset and
set both WDTOVF and SWRST to flag an error.
8.
Power Saving Modes
The AT89LP428/828 supports two different power-reducing modes: Idle and Power-down.
These modes are accessed through the PCON register.
8.1
Idle Mode
Setting the IDL bit in PCON enters idle mode. Idle mode halts the internal CPU clock. The CPU
state is preserved in its entirety, including the RAM, stack pointer, program counter, program
status word, and accumulator. The Port pins hold the logic states they had at the time that Idle
was activated. Idle mode leaves the peripherals running in order to allow them to wake up the
CPU when an interrupt is generated. The timers, UART, SPI, comparators, GPI and CCA
peripherals continue to function during Idle. If these functions are not needed during idle, they
should be explicitly disabled by clearing the appropriate bits in their respective SFRs. The
watchdog may be selectively enabled or disabled during Idle by setting/clearing the WDIDLE bit.
Any enabled interrupt source or reset may terminate Idle mode. When exiting Idle mode with an
interrupt, the interrupt will immediately be serviced, and following RETI the next instruction to be
executed will be the one following the instruction that put the device into Idle.
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相关代理商/技术参数
参数描述
AT89LP428-20JU 功能描述:8位微控制器 -MCU SingleCycle 8051 4K ISP Flash 2.4V RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
AT89LP428-20MH 功能描述:8位微控制器 -MCU SingleCycle 8051 4K ISP Flash 2.4V RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
AT89LP428-20PU 功能描述:8位微控制器 -MCU SingleCycle 8051 4K ISP Flash 2.4V RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
AT89LP51-20AU 功能描述:8位微控制器 -MCU Single Cycle 8051 4K ISP FL RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
AT89LP51-20JU 功能描述:8位微控制器 -MCU Single Cycle 8051 4K ISP FL RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
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