参数资料
型号: AT90S8515-8PC
厂商: Atmel
文件页数: 17/112页
文件大小: 0K
描述: IC MCU 8K FLSH 8MHZ 40DIP
标准包装: 18
系列: AVR® 90S
核心处理器: AVR
芯体尺寸: 8-位
速度: 8MHz
连通性: SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 32
程序存储器容量: 8KB(4K x 16)
程序存储器类型: 闪存
EEPROM 大小: 512 x 8
RAM 容量: 512 x 8
电压 - 电源 (Vcc/Vdd): 4 V ~ 6 V
振荡器型: 内部
工作温度: 0°C ~ 70°C
封装/外壳: 40-DIP(0.600",15.24mm)
包装: 管件
12
AT90S8515
0841G–09/01
SRAM Data Memory –
Internal and External
Figure 8 shows how the AT90S8515 SRAM memory is organized.
Figure 8. SRAM Organization
The lower 608 data memory locations address the Register file, the I/O memory and the
internal data SRAM. The first 96 locations address the Register file + I/O memory, and
the next 512 locations address the internal data SRAM. An optional external data SRAM
can be placed in the same SRAM memory space. This SRAM will occupy the location
following the internal SRAM and up to as much as 64K - 1, depending on SRAM size.
When the addresses accessing the data memory space exceed the internal data SRAM
locations, the external data SRAM is accessed using the same instructions as for the
internal data SRAM access. When the internal data space is accessed, the read and
write strobe pins (RD and WR) are inactive during the whole access cycle. External
SRAM operation is enabled by setting the SRE bit in the MCUCR register. See page 29
for details.
Accessing external SRAM takes one additional clock cycle per byte compared to access
of the internal SRAM. This means that the commands LD, ST, LDS, STS, PUSH and
POP take one additional clock cycle. If the stack is placed in external SRAM, interrupts,
subroutine calls and returns take two clock cycles extra because the 2-byte program
counter is pushed and popped. When external SRAM interface is used with wait state,
Register File
Data Address Space
R0
$0000
R1
$0001
R2
$0002
……
R29
$001D
R30
$001E
R31
$001F
I/O Registers
$00
$0020
$01
$0021
$02
$0022
……
$3D
$005D
$3E
$005E
$3F
$005F
Internal SRAM
$0060
$0061
$025E
$025F
External SRAM
$0260
$0261
$FFFE
$FFFF
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