参数资料
型号: ATICE10
厂商: Atmel
文件页数: 30/35页
文件大小: 0K
描述: AVR IN CIRCUIT EMULATOR
标准包装: 1
Special Considerations
When measuring differential signals, the lowest possible signal is approximately 8 mV.
For any signals below this value, the voltage output of the instrumentation amplifier will
be 8 mV (maximum). When measuring single-ended signals, the instrumentation ampli-
fier is bypassed and the signal may be in the range 0V to V REF .
The differential amplifier and gain stages are supplied with 7V on the pod. To protect the
ADC chip from any voltage levels exceeding 5.8V (for instance, when using 20x amplifi-
cation and an input signal >0.29V), a clamping diode and a series resistor of 51 ? are
coupled to the ADC input pin.
Note:
The signal applied to the ADC inputs multiplied with the selected gain (1x or
20x) should never exceed 5.5V DC .
The multiplexer selecting the reference voltage to the ADC has internal clamping diodes
to V CC on all inputs. If target V CC is present and the emulator power is switched off, the
clamping diodes will conduct current directly to GND. To limit this current, two 470 ?
resistors are coupled in series with external reference signal.
Under no circumstances should the target power be present while the emulator is
switched off.
IMPORTANT: In a critical application using ADC (for instance, a battery charger charg-
ing LiIon batteries), the emulator should not be used as a replacement for the actual
device during testing due to inaccuracy and noise in the ADC.
Table 6-1. ADC Characteristics (Only Values Differing from the Actual Device are
Displayed)
Parameter
V IN
Condition
Single-ended
Differential 1x
Min
0
0.008
Typ
Max
5.5
5.5
Units
V
V
V REF
Differential 20x
8
1.2
275
5.5
mV
V
V INT
V BG
R REF
Normal operation
Target V CC present, emulator turned off
2.440
1.20
1M
470
2.495
1.25
2.550
1.29
V
V
ohm
ohm
6.4
6.5
6.6
Noise Canceler
Mode
Timer/Counter1
Analog
The ADC noise canceler mode featured is implemented as idle mode in ICE10, not
power-down mode as in the actual device.
Due to synchronization of the CP U and Timer/Counter 1, data written into
Timer/Counter1 is delayed by one CPU clock cycle. This applies to both the ATtiny15
device and ICE10 emulating ATtiny15. Due to this synchronization mechanism, values
written to TCNT1 in AVR Studio ’ s I/O view will not be updated before the program is
single stepped or another I/O location is written.
The input voltage range of the analog comparator is 0 to 3.5 volts in ICE 10. Hence if
6-2
Comparator
both inputs are > 3.5 volts, the output of the comparator is undertermined.
AVR ? ATICE10 User Guide
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