参数资料
型号: ATMEGA649V-8AUR
厂商: Atmel
文件页数: 98/146页
文件大小: 0K
描述: IC AVR MCU FLASH 64K 1.8V 64TQFP
产品培训模块: megaAVR Introduction
标准包装: 1,000
系列: AVR® ATmega
核心处理器: AVR
芯体尺寸: 8-位
速度: 8MHz
连通性: SPI,UART/USART,USI
外围设备: 欠压检测/复位,LCD,POR,PWM,WDT
输入/输出数: 53
程序存储器容量: 64KB(32K x 16)
程序存储器类型: 闪存
EEPROM 大小: 2K x 8
RAM 容量: 4K x 8
电压 - 电源 (Vcc/Vdd): 1.8 V ~ 5.5 V
数据转换器: A/D 8x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 64-TQFP
包装: 带卷 (TR)
其它名称: ATMEGA649V-8AUR-ND
ATMEGA649V-8AURTR
2010-2012 Microchip Technology Inc.
DS41440C-page 339
PIC16(L)F1825/1829
CALL
Call Subroutine
Syntax:
[ label ] CALL k
Operands:
0
k 2047
Operation:
(PC)+ 1
TOS,
k
PC<10:0>,
(PCLATH<6:3>)
PC<14:11>
Status Affected:
None
Description:
Call Subroutine. First, return address
(PC + 1) is pushed onto the stack.
The eleven-bit immediate address is
loaded into PC bits <10:0>. The upper
bits of the PC are loaded from
PCLATH. CALL is a two-cycle instruc-
tion.
CALLW
Subroutine Call With W
Syntax:
[ label ] CALLW
Operands:
None
Operation:
(PC) +1
TOS,
(W)
PC<7:0>,
(PCLATH<6:0>)
PC<14:8>
Status Affected:
None
Description:
Subroutine call with W. First, the
return address (PC + 1) is pushed
onto the return stack. Then, the con-
tents of W is loaded into PC<7:0>,
and the contents of PCLATH into
PC<14:8>. CALLW is a two-cycle
instruction.
CLRF
Clear f
Syntax:
[ label ] CLRF
f
Operands:
0
f 127
Operation:
00h
(f)
1 Z
Status Affected:
Z
Description:
The contents of register ‘f’ are cleared
and the Z bit is set.
CLRW
Clear W
Syntax:
[ label ] CLRW
Operands:
None
Operation:
00h
(W)
1 Z
Status Affected:
Z
Description:
W register is cleared. Zero bit (Z) is
set.
CLRWDT
Clear Watchdog Timer
Syntax:
[ label ] CLRWDT
Operands:
None
Operation:
00h
WDT
0 WDT prescaler,
1 TO
1 PD
Status Affected:
TO, PD
Description:
CLRWDT instruction resets the Watch-
dog Timer. It also resets the prescaler
of the WDT.
Status bits TO and PD are set.
COMF
Complement f
Syntax:
[ label ] COMF
f,d
Operands:
0
f 127
d
[0,1]
Operation:
(f)
(destination)
Status Affected:
Z
Description:
The contents of register ‘f’ are com-
plemented. If ‘d’ is ‘0’, the result is
stored in W. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
DECF
Decrement f
Syntax:
[ label ] DECF f,d
Operands:
0
f 127
d
[0,1]
Operation:
(f) - 1
(destination)
Status Affected:
Z
Description:
Decrement register ‘f’. If ‘d’ is ‘0’, the
result is stored in the W
register. If ‘d’ is ‘1’, the result is stored
back in register ‘f’.
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