参数资料
型号: ATTINY2313A-SUR
厂商: Atmel
文件页数: 43/172页
文件大小: 0K
描述: MCU AVR 2KB FLASH 20MHZ 20SOIC
产品培训模块: tinyAVR Introduction
标准包装: 1,000
系列: AVR® ATtiny
核心处理器: AVR
芯体尺寸: 8-位
速度: 20MHz
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 18
程序存储器容量: 2KB(1K x 16)
程序存储器类型: 闪存
EEPROM 大小: 128 x 8
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 1.8 V ~ 5.5 V
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 20-SOIC(0.295",7.50mm 宽)
包装: 带卷 (TR)
其它名称: ATTINY2313A-SUR-ND
2003 Microchip Technology Inc.
DS30569B-page 135
PIC16F870/871
FIGURE 14-13:
A/D CONVERSION TIMING
TABLE 14-10: A/D CONVERSION REQUIREMENTS
131
130
132
BSF ADCON0, GO
Q4
A/D CLK
A/D DATA
ADRES
ADIF
GO
SAMPLE
OLD_DATA
SAMPLING STOPPED
DONE
NEW_DATA
(TOSC/2)(1)
98
7
2
1
0
Note
1:
If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the
SLEEP
instruction to be executed.
1 TCY
. . .
Param
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
130
TAD
A/D clock period
Standard(F)
1.6
sTOSC based, VREF ≥ 3.0V
Extended(LF)3.0
sTOSC based, VREF ≥ 2.0V
Standard(F)
2.0
4.0
6.0
s
A/D RC Mode
Extended(LF)
3.0
6.0
9.0
s
A/D RC Mode
131
TCNV
Conversion time (not including S/H time)
(Note 1)
—12
TAD
132
TACQ
Acquisition time
(Note 2)
10*
40
s
The minimum time is the ampli-
fier settling time. This may be
used if the "new" input voltage
has not changed by more than
1 LSb (i.e., 20.0 mV @ 5.12V)
from the last sampled voltage
(as stated on CHOLD).
134
TGO
Q4 to A/D clock start
TOSC/2 §
If the A/D clock source is
selected as RC, a time of TCY is
added before the A/D clock
starts. This allows the SLEEP
instruction to be executed.
*
These parameters are characterized but not tested.
Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
§
This specification ensured by design.
Note
1:
ADRES register may be read on the following TCY cycle.
2:
See Section 10.1 for min conditions.
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