参数资料
| 型号： | BD3512MUV-E2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 12/17页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ 3A 20QFN |
| 标准包装： | 2,500 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 0.65 V ~ 2.7 V |
| 输入电压： | 0.7 V ~ 5.5 V |
| 电压 - 压降（标准）： | 0.065V @ 1A |
| 稳压器数量： | 1 |
| 电流 - 输出： | 3A（最小） |
| 工作温度： | -10°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-VFQFN 裸露焊盘 |
| 供应商设备封装： | VQFN020V4040 |
| 包装： | 带卷 (TR) |
160.1 ℃ /W 1-layer substrate (copper foil area : 0mm )
82.6 ℃ /W 4-layer substrate (copper foil area : 10.29mm )
31.2 ℃ /W 4-layer substrate (copper foil area : 5505mm )
Substrate size: 74.2 × 74.2 × 1.6mm (substrate with thermal via)
● Heat Loss
Thermal design should allow operation within the following conditions. Note that the temperatures listed are the allowed
temperature limits, and thermal design should allow sufficient margin from the limits.
1. Ambient temperature Ta can be no higher than 100 ℃ .
2. Chip junction temperature (Tj) can be no higher than 150 ℃ .
Chip junction temperature can be determined as follows:
① Calculation based on ambient temperature (Ta)
Tj=Ta+ θ j-a × W
＜ Reference values ＞
θ j-a:VQFN020V4040 249.5 ℃ /W IC only
2
2
2
3
It is recommended to layout the VIA for heat radiation in the GND pattern of reverse (of IC) when there is the GND pattern in
the inner layer (in using multiplayer substrate). This package is so small (size: 2.9mm × 3.0mm) that it is not available to
layout the VIA in the bottom of IC. Spreading the pattern and being increased the number of VIA like the figure below enable
to get the superior heat radiation characteristic. (This figure is the image. It is recommended that the VIA size and the
number is designed suitable for the actual situation.).
Most of the heat loss that occurs in the BD3512MUV is generated from the output Nch FET. Power loss is determined by the
total V IN -Vo voltage and output current. Be sure to confirm the system input and output voltage and the output current
conditions in relation to the heat dissipation characteristics of the V IN and Vo in the design. Bearing in mind that heat
dissipation may vary substantially depending on the substrate employed (due to the power package incorporated in the
BD3512MUV) make certain to factor conditions such as substrate size into the thermal design.
Power consumption (W) =
Input voltage (VIN)- Output voltage (Vo) (Vo ≒ VREF) × Io(Ave)
Example) Where VIN=1.5V, VO=1.25V, Io(Ave) = 4A,
Power consumption (W) = 1.5(V)-1.2(V)
× 4.0(A)
= 1.0(W)
12/16
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