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参数资料
| 型号： | BU-64703B9-200 |
| 厂商： | DATA DEVICE CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CBGA80 |
| 封装： | CERAMIC, BGA-80 |
| 文件页数： | 48/48页 |
| 文件大小： | 405K |
| 代理商： | BU-64703B9-200 |
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Data Device Corporation
www.ddc-web.com
BU-64703
D-03/06-0
Command Word followed by the correct number of valid Data
Words and assuming that all words are successfully transferred
to the subsystem, a negative pulse will be asserted on the Good
Block Received (GBR) output. The width of this pulse is two clock
cycles.
In burst mode, a DMA handshake will not be initiated until after
all data words have been received over the 1553 data bus and
stored into the SSRT Mark3's internal FIFO. After the handshake
has been negotiated, the SSRT Mark3 will burst the contents of
the FIFO to the local bus (D0-D15). After the reception of a valid
non-mode code receive command word followed by the correct
number of valid data words and assuming that all words are suc-
cessfully transferred to the subsystem, a negative pulse will be
asserted on the output Good Block Received (GBR). The width
of this pulse is two clock cycles.
RT-TO-RT TRANSFER ERRORS
For the case where the SSRT Mark3 is the receiving RT of an
RT-to-RT transfer, if the transmitting RT does not respond within
the specified time period, the SSRT Mark3 will determine that a
timeout condition has occurred. The value of the SSRT Mark3's
RT-to-RT timeout timer is in the range from 17.5 to 18.5 s, and
is specified from the mid-parity bit crossing of the transmit com-
mand word to the mid-sync crossing of the transmitting RT's sta-
tus word. In the case of an RT-to-RT timeout, the SSRT Mark3
will not respond and the RT-to-RT NO TRANSFER TIMEOUT bit
(bit 2) of the SSRT Mark3's BIT Word will be set to logic "1".
Also, if the SSRT Mark3 is the receiving RT for an RT-to-RT
transfer, and the T/R bit of the second command word is logic
"0", or the RT address field for the transmit command is the
same as for the receive command, or the subaddress for the
transmit command is 00000 or 11111, the SSRT Mark3 will not
respond, and will set the RT-to-RT SECOND COMMAND
ERROR bit (bit 1) of the RT BIT word to logic "1".
RT STATUS, ERROR HANDLING, AND MESSAGE
TIMING SIGNALS
Message transfers and transfer errors are indicated by means of
the INCMD, HS_FAIL, MSG_ERR, and RTFAIL error indication
outputs. Additional error detection and indication mechanisms
include updating of the internal command, RT status and BIT
word registers.
The SSRT Mark3 provides a number of timing signals during the
processing of 1553 messages. INCMD is asserted low when a
new command is received. At the end of a message (either valid
or invalid), INCMD transitions from low to high.
As discussed above, HS_FAIL will be asserted low if the subsys-
tem fails to respond to DTREQ within the maximum amount of
time (10 s).
Following the last data word transfer for a valid non-mode code
receive message (for either non-burst mode or burst mode),
GBR will be asserted low for two clock cycles.
The external device may be used to define the legality of specif-
ic commands. Any subset of the possible 1553 commands may
be illegalized as a function of broadcast, T/R bit, subaddress,
word count, and/or mode code. The output of the illegalization
device should be tied directly to the SSRT Mark3's ILLEGAL sig-
nal input. The maximum access time of the external illegalizing
device is 400 ns.
If illegalization is not used, ILLEGAL should be hardwired to logic "1".
BUSY
The external subsystem may control the SSRT Mark3's Busy RT
status word bit by means of the BUSY input signal. The SSRT
Mark3 samples BUSY approximately 2 s following the mid-par-
ity bit zero crossing of the received Command Word. If BUSY is
sampled low for a particular message, the value of the busy bit
transmitted in the SSRT Mark3's status word will be logic "1". If
BUSY is sampled high for a particular message, the value of the
busy bit transmitted in the SSRT Mark3's status word will be logic
"0".
If the RT responds to a transmit command with a busy bit of logic
"1", the status word will be transmitted, but no data words will be
transmitted by the SSRT Mark3. If the SSRT Mark3 responds to
a receive command with a busy bit of logic "1", data words will
be transferred to the external subsystem (although these may be
blocked by means of external logic).
Similar to ILLEGAL, it is possible to cause the SSRT Mark3 to
respond with Busy for specific command words (only), by means
of an external PROM, RAM, or PLD device.
TRANSMIT COMMAND (RT-TO-BC TRANSFER)
If the SSRT Mark3 receives a valid Transmit command word that
the subsystem determines is legal (input signal ILLEGAL is high)
and the subsystem is not BUSY (input signal BUSY is high), the
SSRT Mark3 will initiate a transmit data response following
transmission of its status word. This entails a handshake/read
cycle for each data word transmitted, with the number of data
words to be transmitted specified by the word count field of the
transmit command word.
If ILLEGAL is sampled low, the Message Error bit will be set in
the SSRT Mark3's status word. No data words will be transmit-
ted following transmission of the status word to an illegalized
transmit command. A low on the BUSY input will set the busy bit
in the Status Word; in this instance, only the status word will be
transmitted, with no data words.
RECEIVE COMMAND (BC-TO-RT TRANSFER)
In non-burst mode, a DMA handshake will be initiated for each
data word received from the 1553 data bus. If successful, the
respective handshake will be followed by a corresponding write
cycle. A handshake timeout will not terminate transfer attempts
for the remaining data words, error flagging or Status Word trans-
mission. After the reception of a valid non-mode code receive
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