参数资料
型号: BU9832GUL-WE2
厂商: Rohm Semiconductor
文件页数: 14/29页
文件大小: 0K
描述: IC EEPROM 8KBIT SPI VCSP50L2 TR
标准包装: 3,000
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 8K (1K x 8)
速度: 5MHz
接口: SPI 串行
电源电压: 1.8 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-VFBGA,CSPBGA
供应商设备封装: VCSP50L2
包装: 带卷 (TR)
BU9832GUL-W (8Kbit)
Datasheet
● Features
○ Status registers
This IC has status registers. The status registers are of 8 bits and express the following parameters.
BP0 and BP1 can be set by write status register command. These 2 bits are memorized into the EEPROM, therefore are
valid even when power source is turned off.
Rewrite characteristics and data hold time are same as characteristics of the EEPROM.
WEN can be set by write enable command and write disable command. WEN becomes write disable status when power
source is turned off. R /B is for write confirmation, therefore cannot be set externally.
The value of status register can be read by read status command.
● Status registers
Product number
BU9832GUL-W
bit 7
WPEN
bit 6
0
bit 5
0
bit 4
0
bit 3
BP1
bit 2
BP0
bit 1
WEN
bit 0
R /B
bit
WPEN
Memory
location
EEPROM
Function
WP pin enable / disable designation bit
WPEN=0=invalid
WPEN=1=valid
Contents
This enables / disables the functions of WP
pin.
BP1
BP0
EEPROM EEPROM write disable block designation bit
Write and write status register write
This designates the write disable area of
EEPROM. Write designation areas of product
numbers are shown below.
WEN
R/B
Register
Register
enable / disable status confirmation bit
WEN=0=prohibited
WEN=1=permitted
Write cycle status (READY / BUSY) status
confirmation bit
R / B =0=READY
R / B =1=BUSY
● Write disable block setting
BP1
0
0
1
1
BP0
0
1
0
1
Write disable block
None
300h-3FFh
200h-3FFh
000h-3FFh
○ WP pin
By setting WP =LOW, write command is prohibited. As for BU9832GUL-W when WPEN bit is set “1”, the WP pin
functions become valid. And the write command to be disabled at this moment is WRSR.
However, when write cycle is in execution, no interruption can be made.
Product number
BU9832GUL-W
WRSR
Prohibition possible but WPEN bit “1”
WRITE
Prohibition impossible
○ HOLD pin
By HOLD pin, data transfer can be interrupted. When SCK=”1”, by making HOLD from “1” into”0”, data transfer to
EEPROM is interrupted. When SCK = “0”, by making HOLD from “0” into “1”, data transfer is restarted.
www.rohm.com
? 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111 ? 15 ? 001
14/26
TSZ02201-0R2R0G100410-1-2
30.AUG.2012 Rev.001
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