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参数资料
| 型号： | BX80536GE2266FJ |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 2260 MHz, MICROPROCESSOR, CPGA478 |
| 封装： | FLIP CHIP, MICRO PGA-478 |
| 文件页数： | 18/30页 |
| 文件大小： | 887K |
| 代理商： | BX80536GE2266FJ |
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Datasheet
25
Electrical Specifications
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. VIL is defined as the maximum voltage level at a receiving agent that will be interpreted as a logical low value.
3. VIH is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical high
value.
4. VIH and VOH may experience excursions above VCCP. However, input signal drivers must comply with the
signal quality specifications in Chapter 3.
5. This is the pull down driver resistance. Refer to processor I/O Buffer Models for I/V characteristics. Measured
at 0.31*VCCP. RON (min) = 0.38*RTT, RON (typ) = 0.45*RTT, RON (max) = 0.52*RTT.
6. GTLREF should be generated from VCCP with a 1% tolerance resistor divider. The VCCP referred to in these
specifications is the instantaneous VCCP.
7. RTT is the on-die termination resistance measured at VOL of the AGTL+ output driver. Measured at
0.31*VCCP. RTT is connected to VCCP on die. Refer to processor I/O buffer models for I/V characteristics.
8. Specified with on die RTT and RON are turned off.
9. Cpad includes die capacitance only. No package parasitics are included.
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. The VCCP referred to in these specifications refers to instantaneous VCCP.
3. Refer to the processor I/O Buffer Models for I/V characteristics.
4. Measured at 0.1*VCCP.
5. Measured at 0.9*VCCP.
6. For Vin between 0V and VCCP. Measured when the driver is tristated.
7. Cpad includes die capacitance only. No package parasitics are included.
Table 3-7. AGTL+ Signal Group DC Specifications
Symbol
Parameter
Min
Typ
Max
Unit
Notes1
VCCP
I/O Voltage
0.997
1.05
1.102
V
GTLREF
Reference Voltage
2/3 VCCP -
2%
2/3 VCCP
2/3 VCCP +
2%
V6
VIH
Input High Voltage
GTLREF+0.1
VCCP+0.1
V
3,6
VIL
Input Low Voltage
-0.1
GTLREF-0.1
V
2,4
VOH
Output High Voltage
VCCP
6
R
TT
Termination Resistance
50
55
61
,
7
RON
Buffer On Resistance
22
25
28
5
ILI
Input Leakage Current
± 100
A
8
Cpad
Pad Capacitance
1.8
2.3
2.75
pF
9
Table 3-8. CMOS Signal Group DC Specifications
Symbol
Parameter
Min
Typ
Max
Unit
Notes1
VCCP
I/O Voltage
0.997
1.05
1.102
V
VIL
Input Low Voltage
CMOS
-0.1
0.3*VCCP
V
2, 3
VIH
Input High Voltage
0.7*VCCP
VCCP+0.1
V
2
VOL
Output Low Voltage
-0.1
0
0.1*VCCP
V
2
VOH
Output High Voltage
0.9*VCCP
VCCP
VCCP+0.1
V
2
IOL
Output Low Current
1.49
4.08
mA
4
IOH
Output High Current
1.49
4.08
mA
5
ILI
Leakage Current
± 100
A
6
Cpad
Pad Capacitance
1.0
2.3
3.0
pF
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