参数资料
型号: C8051F000-TB
厂商: Silicon Laboratories Inc
文件页数: 136/171页
文件大小: 0K
描述: BOARD PROTOTYPING W/C8051F000
标准包装: 1
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
67
Rev. 1.7
Mnemonic
Description
Bytes
Clock
Cycles
ACALL addr11
Absolute subroutine call
2
3
LCALL addr16
Long subroutine call
3
4
RET
Return from subroutine
1
5
RETI
Return from interrupt
1
5
AJMP addr11
Absolute jump
2
3
LJMP addr16
Long jump
3
4
SJMP rel
Short jump (relative address)
2
3
JMP @A+DPTR
Jump indirect relative to DPTR
1
3
JZ rel
Jump if A equals zero
2
2/3
JNZ rel
Jump if A does not equal zero
2
2/3
CJNE A,direct,rel
Compare direct byte to A and jump if not equal
3
3/4
CJNE A,#data,rel
Compare immediate to A and jump if not equal
3
3/4
CJNE Rn,#data,rel
Compare immediate to register and jump if not
equal
3
3/4
CJNE @Ri,#data,rel
Compare immediate to indirect and jump if not
equal
3
4/5
DJNZ Rn,rel
Decrement register and jump if not zero
2
2/3
DJNZ direct,rel
Decrement direct byte and jump if not zero
3
3/4
NOP
No operation
1
Notes on Registers, Operands and Addressing Modes:
Rn - Register R0-R7 of the currently selected register bank.
@Ri - Data RAM location addressed indirectly through register R0-R1
rel - 8-bit, signed (two’s compliment) offset relative to the first byte of the following instruction. Used by SJMP
and all conditional jumps.
direct - 8-bit internal data location’s address. This could be a direct-access Data RAM location (0x00-0x7F) or an
SFR (0x80-0xFF).
#data - 8-bit constant
#data 16 - 16-bit constant
bit - Direct-addressed bit in Data RAM or SFR.
addr 11 - 11-bit destination address used by ACALL and AJMP. The destination must be within the same 2K-
byte page of program memory as the first byte of the following instruction.
addr 16 - 16-bit destination address used by LCALL and LJMP. The destination may be anywhere within the
64K-byte program memory space.
There is one unused opcode (0xA5) that performs the same function as NOP.
All mnemonics copyrighted Intel Corporation 1980.
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