参数资料
| 型号： | CDB5461AU |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 28/44页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL & SOFTWARE CS5461A |
| 标准包装： | 1 |
| 主要目的： | 电源管理，电度表/功率表 |
| 嵌入式： | 是，MCU，8 位 |
| 已用 IC / 零件： | CS5461A |
| 主要属性： | 1 相，能量至频率输出 |
| 次要属性： | GUI、USB、SPI、Microwire 接口 |
| 已供物品： | 板 |
| 产品目录页面： | 754 (CN2011-ZH PDF) |
| 相关产品： | CS5461A-ISZR-ND - IC ENERGY METERING 1PHASE 24SSOP 598-1095-5-ND - IC ENERGY METERING 1PHASE 24SSOP |
| 其它名称： | 598-1552 |
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CS5461A
6.5 PulseRateE 1,2 Register
Address: 6
MSB
LSB
2 18
2 17
2 16
2 15
2 14
2 13
2 12
2 11
.....
2 1
2 0
2 -1
2 -2
2 -3
2 -4
2 -5
Default = 0xFA000 = 32000.00 Hz
PulseRateE 1,2 sets the frequency of the E1 and/or E2 pulses. The smallest valid frequency is 2 -4 with 2 -5 incre-
mental steps. A pulse rate higher than (MCLK/K)/8 will result in a pulse rate setting of (MCLK/K)/8. The value
is represented in unsigned notation, with the binary point to the right of bit 5.
6.6 Instantaneous Current, Voltage and Power Registers ( I , V , P )
Address: 7 (Instantaneous Current); 8 (Instantaneous Voltage); 9 (Instantaneous Power)
MSB
LSB
-(2 0 )
2 -1
2 -2
2 -3
2 -4
2 -5
2 -6
2 -7
.....
2 -17
2 -18
2 -19
2 -20
2 -21
2 -22
2 -23
I and V contain the instantaneous measured values for current and voltage, respectively. The instantaneous
voltage and current samples are multiplied to obtain Instantaneous Power (P). The value is represented in two's
complement notation and in the range of -1.0 ? I, V, P ? 1.0, with the binary point to the right of the MSB.
6.7 Active (Real) Power Registers ( P Active )
Address: 10
MSB
LSB
-(2 0 )
2 -1
2 -2
2 -3
2 -4
2 -5
2 -6
2 -7
.....
2 -17
2 -18
2 -19
2 -20
2 -21
2 -22
2 -23
The instantaneous power is averaged over each computation cycle (N conversions) to compute Active Power
(P Active ). The value is represented in two's complement notation and in the range of -1.0 ? P Active ? 1.0, with the
binary point to the right of the MSB.
6.8 I RMS and V RMS Registers ( I RMS , V RMS )
Address: 11 (I RMS ); 12 (V RMS )
MSB
LSB
2 -1
2 -2
2 -3
2 -4
2 -5
2 -6
2 -7
2 -8
.....
2 -18
2 -19
2 -20
2 -21
2 -22
2 -23
2 -24
I RMS and V RMS contain the Root Mean Square (RMS) value of I and V, calculated over each computation cycle.
The value is represented in unsigned binary notation and in the range of 0.0 ? I RMS , V RMS ? 1.0, with the binary
point to the left of the MSB.
6.9 Power Offset Register ( P off )
Address: 14
MSB
LSB
-(2 0 )
2 -1
2 -2
2 -3
2 -4
2 -5
2 -6
2 -7
.....
2 -17
2 -18
2 -19
2 -20
2 -21
2 -22
2 -23
Default = 0x000000
Power Offset (P off ) is added to the instantaneous power being accumulated in the P active register and can be
used to offset contributions to the energy result that are caused by undesirable sources of energy that are in-
herent in the system. The value is represented in two's complement notation and in the range of -1.0 ? P off ? 1.0,
with the binary point to the right of the MSB.
28
DS661F3
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