参数资料
| 型号： | CDB5461AU |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 30/44页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL & SOFTWARE CS5461A |
| 标准包装： | 1 |
| 主要目的： | 电源管理，电度表/功率表 |
| 嵌入式： | 是，MCU，8 位 |
| 已用 IC / 零件： | CS5461A |
| 主要属性： | 1 相，能量至频率输出 |
| 次要属性： | GUI、USB、SPI、Microwire 接口 |
| 已供物品： | 板 |
| 产品目录页面： | 754 (CN2011-ZH PDF) |
| 相关产品： | CS5461A-ISZR-ND - IC ENERGY METERING 1PHASE 24SSOP 598-1095-5-ND - IC ENERGY METERING 1PHASE 24SSOP |
| 其它名称： | 598-1552 |
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CS5461A
6.11 Current and Voltage AC Offset Register ( V ACoff , I ACoff )
Address: 16 (Current AC Offset); 17 (Voltage AC Offset)
MSB
LSB
-(2 0 )
2 -1
2 -2
2 -3
2 -4
2 -5
2 -6
2 -7
.....
2 -17
2 -18
2 -19
2 -20
2 -21
2 -22
2 -23
Default = 0x000000
The AC Offset Registers (V ACoff , I ACoff ) are initialized to zero on reset, allowing for uncalibrated normal operation.
AC Offset Calibration updates these registers. This sequence lasts approximately (6N + 30) ADC cycles (where
N is the value of the Cycle Count Register ). DRDY will be asserted at the end of the calibration. These values
may be read and stored for future system AC offset compensation. The value is represented in two's comple-
ment notation and in the range of -1.0 ? V ACoff , I ACoff ? 1.0, with the binary point to the right of the MSB.
6.12 PulseRateE 3 Register
Address: 18
MSB
LSB
2 18
2 17
2 16
2 15
2 14
2 13
2 12
2 11
.....
2 1
2 0
2 -1
2 -2
2 -3
2 -4
2 -5
Default = 0xFA0000 = 32000.00 Hz
PulseRateE 3 sets the frequency of the E3 pulses. The register’s smallest valid frequency is 2 -4 with 2 -5 incre-
mental steps. A pulse rate higher than (MCLK/K)/8 will result in a pulse rate setting of (MCLK/K)/8. The value
is represented in unsigned notation, with the binary point to the right of bit #5.
6.13 Temperature Register ( T )
Address: 19
MSB
LSB
-(2 7 )
2 6
2 5
2 4
2 3
2 2
2 1
2 0
.....
2 -10
2 -11
2 -12
2 -13
2 -14
2 -15
2 -16
T contains measurements from the on-chip temperature sensor. Measurements are performed during continu-
ous conversions, with the default the Celsius scale ( o C). The value is represented in two's complement notation
and in the range of -128.0 ? T ? 128.0, with the binary point to the right of the eighth MSB.
6.14 System Gain Register ( SYS Gain )
Address: 20
MSB
LSB
-(2 1 )
2 0
2 -1
2 -2
2 -3
2 -4
2 -5
2 -6
.....
2 -16
2 -17
2 -18
2 -19
2 -20
2 -21
2 -22
Default = 0x500000 = 1.25
System Gain (SYS Gain ) determines the one’s density of the channel measurements. Small changes in the mod-
ulator due to temperature can be fine adjusted by changing the system gain. The value is represented in two's
complement notation and in the range of -2.0 ? SYS Gain ? 2.0, with the binary point to the right of the second
MSB.
30
DS661F3
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