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参数资料
| 型号： | COP8SGA040N9 |
| 厂商： | National Semiconductor Corporation |
| 英文描述： | 8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART |
| 中文描述： | 8位的CMOS基于ROM和OTP微控制器具有8K到32K的内存，2个比较器和USART |
| 文件页数： | 46/62页 |
| 文件大小： | 913K |
| 代理商： | COP8SGA040N9 |
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13.0 Memory Map
All RAM, ports and registers (except A and PC) are mapped
into data memory address space.
Address
S/ADD REG
0000 to 006F
0070 to 007F
Contents
On-Chip RAM bytes (112 bytes)
Unused RAM Address Space (Reads As
All Ones)
Unused RAM Address Space (Reads
Undefined Data)
Port F data register, PORTFD
Port F configuration register, PORTFC
Port F input pins (read only), PORTFP
Unused address space (Reads Undefined
Data)
Timer T3 Lower Byte
Timer T3 Upper Byte
Timer T3 Autoload Register T3RA Lower
Byte
Timer T3 Autoload Register T3RA Upper
Byte
Timer T3 Autoload Register T3RB Lower
Byte
Timer T3 Autoload Register T3RB Upper
Byte
Timer T3 Control Register
Comparator Select Register (Reg:CMPSL)
UART Transmit Buffer (Reg:TBUF)
UART Receive Buffer (Reg:RBUF)
UART Control and Status Register
(Reg:ENU)
UART Receive Control and Status
Register (Reg:ENUR)
UART Interrupt and Clock Source Register
(Reg:ENUI)
UART Baud Register (Reg:BAUD)
UART Prescale Select Register (Reg:PSR)
Reserved for UART
Timer T2 Lower Byte
Timer T2 Upper Byte
Timer T2 Autoload Register T2RA Lower
Byte
Timer T2 Autoload Register T2RA Upper
Byte
Timer T2 Autoload Register T2RB Lower
Byte
Timer T2 Autoload Register T2RB Upper
Byte
Timer T2 Control Register
WATCHDOG Service Register
(Reg:WDSVR)
MIWU Edge Select Register
(Reg:WKEDG)
xx80 to xx93
xx94
xx95
xx96
xx97 to xxAF
xxB0
xxB1
xxB2
xxB3
xxB4
xxB5
xxB6
xxB7
xxB8
xxB9
xxBA
xxBB
xxBC
xxBD
xxBE
xxBF
xxC0
xxC1
xxC2
xxC3
xxC4
xxC5
xxC6
xxC7
xxC8
Address
S/ADD REG
xxC9
xxCA
xxCB to xxCF
xxD0
xxD1
xxD2
xxD3
xxD4
xxD5
xxD6
xxD7
Contents
MIWU Enable Register (Reg:WKEN)
MIWU Pending Register (Reg:WKPND)
Reserved
Port L Data Register
Port L Configuration Register
Port L Input Pins (Read Only)
Reserved for Port L
Port G Data Register
Port G Configuration Register
Port G Input Pins (Read Only)
Port I Input Pins (Read Only) (Actually
reads Port F input pins)
Port C Data Register
Port C Configuration Register
Port C Input Pins (Read Only)
Reserved for Port C
Port D
Reserved for Port D
Reserved for EE Control Registers
Timer T1 Autoload Register T1RB Lower
Byte
Timer T1 Autoload Register T1RB Upper
Byte
ICNTRL Register
MICROWIRE/PLUS Shift Register
Timer T1 Lower Byte
Timer T1 Upper Byte
Timer T1 Autoload Register T1RA Lower
Byte
Timer T1 Autoload Register T1RA Upper
Byte
CNTRL Control Register
PSW Register
On-Chip RAM Mapped as Registers
X Register
SP Register
B Register
S Register
On-Chip 128 RAM Bytes
On-Chip 128 RAM Bytes (Reads as
undefined data on COP8SGE)
On-Chip 128 RAM Bytes (Reads as
undefined data on COP8SGE)
xxD8
xxD9
xxDA
xxDB
xxDC
xxDD to xxDF
xxE0 to xxE5
xxE6
xxE7
xxE8
xxE9
xxEA
xxEB
xxEC
xxED
xxEE
xxEF
xxF0 to FB
xxFC
xxFD
xxFE
xxFF
0100–017F
0200–027F
0300–037F
Note:
Reading memory locations 0070H–007FH (Segment 0) will return all
ones. Reading unused memory locations 0080H–0093H (Segment 0)
will return undefined data. Reading memory locations from other Seg-
ments (i.e., Segment 4, Segment 5, … etc.) will return undefined data.
C
www.national.com
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相关代理商/技术参数 |
参数描述 |
|---|---|
| COP8SGA040Q3 | 制造商:NSC 制造商全称:National Semiconductor 功能描述:8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART |
| COP8SGA040Q6 | 制造商:NSC 制造商全称:National Semiconductor 功能描述:8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART |
| COP8SGA040Q7 | 制造商:NSC 制造商全称:National Semiconductor 功能描述:8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART |
| COP8SGA040Q8 | 制造商:NSC 制造商全称:National Semiconductor 功能描述:8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART |
| COP8SGA040Q9 | 制造商:NSC 制造商全称:National Semiconductor 功能描述:8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART |
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