参数资料
型号: CS2000P-DZZR
厂商: CIRRUS LOGIC INC
元件分类: PLL合成/DDS/VCOs
中文描述: PHASE LOCKED LOOP, 30 MHz, PDSO10
封装: 3 MM, LEAD FREE, MO-187, MSOP-10
文件页数: 16/26页
文件大小: 251K
代理商: CS2000P-DZZR
CS2200-CP
DS759F2
23
9. CALCULATING THE USER DEFINED RATIO
Note:
The software for use with the evaluation kit has built in tools to aid in calculating and converting the User
Defined Ratio. This section is for those who are not interested in the software or who are developing their
systems without the aid of the evaluation kit.
Most calculators do not interpret the fixed point binary representation which the CS2200 uses to define the output
to input clock ratio (see Section 5.2.1 on page 12); However, with a simple conversion we can use these tools to
generate a binary or hex value which can be written to the Ratio register.
9.1
12.20 Format
To calculate the User Defined Ratio (RUD) to store in the register(s), divide the desired output clock frequen-
cy by the given input clock (RefClk). Then multiply the desired ratio by the scaling factor of 220 to get the
scaled decimal representation; then use the decimal to binary/hex conversion function on a calculator and
write to the register. A few examples have been provided in Table 2.
Table 2. Example 12.20 R-Values
Desired Output to Input Clock Ratio
(output clock/input clock)
Scaled Decimal
Representation =
(output clock/input clock)
220
Hex Representation of
Binary RUD
12.288 MHz/10 MHz=1.2288
1288490
00 13 A9 2A
11.2896 MHz/44.1 kHz=256
268435456
10 00 00 00
相关PDF资料
PDF描述
CS2100CP-DZZR
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