- 您现在的位置：买卖IC网 > PDF目录28817 > CS2000P-DZZR (CIRRUS LOGIC INC) PDF资料下载
参数资料
| 型号： | CS2000P-DZZR |
| 厂商： | CIRRUS LOGIC INC |
| 元件分类： | PLL合成/DDS/VCOs |
| 中文描述： | PHASE LOCKED LOOP, 30 MHz, PDSO10 |
| 封装： | 3 MM, LEAD FREE, MO-187, MSOP-10 |
| 文件页数： | 8/26页 |
| 文件大小： | 251K |
| 代理商： | CS2000P-DZZR |
CS2100-CP
16
DS840F2
If CLK_IN is removed and then re-applied within tCS, the ClkSkipEn bit determines whether PLL_OUT
continues while the PLL re-acquires lock (see Figure 14). When ClkSkipEn is disabled and CLK_IN is re-
moved the PLL output will continue until CLK_IN is re-applied at which point the PLL will go unlocked only
for the time it takes to acquire lock; the PLL_OUT state will be determined by the ClkOutUnl bit during this
time. When ClkSkipEn is enabled and CLK_IN is removed the PLL output clock will remain continuous
throughout the missing CLK_IN period including the time while the PLL re-acquires lock.
5.2.2
Adjusting the Minimum Loop Bandwidth for CLK_IN
The CS2000 allows the minimum loop bandwidth of the Digital PLL to be adjusted between 1 Hz and 128
Hz using the ClkIn_BW[2:0] bits. The minimum loop bandwidth of the Digital PLL directly affects the jitter
transfer function; specifically, jitter frequencies below the loop bandwidth corner are passed from the PLL
input directly to the PLL output without attenuation. In some applications it is desirable to have a very low
minimum loop bandwidth to reject very low jitter frequencies, commonly referred to as wander. In others
it may be preferable to remove only higher frequency jitter, allowing the input wander to pass through the
PLL without attenuation.
Referenced Control
Register Location
ClkSkipEn.............................. “Clock Skip Enable (ClkSkipEn)” on page 28
ClkOutUnl.............................. “Enable PLL Clock Output on Unlock (ClkOutUnl)” on page 29
Figure 14. CLK_IN removed for < tCS
CLK_IN
PLL_OUT
UNLOCK
ClkSkipEn=1
ClkOutUnl=0 or 1
CLK_IN
PLL_OUT
UNLOCK
ClkSkipEn=0
ClkOutUnl=1
Lock Time
CLK_IN
PLL_OUT
UNLOCK
ClkSkipEn=0
ClkOutUnl=0
Lock Time
tCS
= invalid clocks
相关PDF资料 |
PDF描述 |
|---|---|
| CS2100CP-DZZR | |
| CS2200CP-DZZR | |
| CS2300CP-DZZR | |
| CS4333-KSR | |
| CS4353-CNZR | |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CS2001 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:1.2 A Switching Regulator, and 5.0 V, 100 mA Linear Regulator with RESET |
| CS2001/D | 制造商:未知厂家 制造商全称:未知厂家 功能描述:1.2A Switching Regulator， and 5.0 V 100mA Linear Regulator with RESETbar |
| CS2001YDWF20 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CS2001YDWFR20 | 功能描述:IC REG BST FLYBK ADJ 1.2A 20SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:3.3V 输入电压:4.5 V ~ 24 V PWM 型:- 频率 - 开关:- 电流 - 输出:125mA 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-6 包装:Digi-Reel® 供应商设备封装:SOT-6 其它名称:MAX1836EUT33#TG16DKR |
| CS2002-8 | 制造商:Edwards Signaling & Security Systems 功能描述:FIRE ALARM STATION, 270-DOC |
发布紧急采购，3分钟左右您将得到回复。