参数资料
型号: CS4265-DNZR
厂商: Cirrus Logic Inc
文件页数: 38/46页
文件大小: 0K
描述: IC CODEC 24BIT 104DB 32-QFN
标准包装: 6,000
类型: 立体声音频
数据接口: 串行
分辨率(位): 24 b
ADC / DAC 数量: 2 / 2
三角积分调变:
动态范围,标准 ADC / DAC (db): 104 / 104
电压 - 电源,模拟: 3.13 V ~ 5.25 V
电压 - 电源,数字: 3.13 V ~ 5.25 V
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 32-QFN
供应商设备封装: 32-QFN 裸露焊盘(5x5)
包装: 带卷 (TR)
配用: 598-1001-ND - BOARD EVAL FOR CS4265 CODEC
DS657F3
43
CS4265
ple rate) if the signal does not encounter a zero crossing. The zero cross function is independently mon-
itored and implemented for each channel. See Table 17.
6.12.2
Invert DAC Output (Bit 5)
Function:
When this bit is set, the output of the DAC is inverted.
6.13
Status - Address 0Dh
For all bits in this register, a ‘1’ means the associated condition has occurred at least once since the register
was last read. A ‘0’ means the associated condition has NOT occurred since the last reading of the register.
Status bits that are masked off in theassociated mask register will always be ‘0’ in this register. Thisregister
defaults to 00h.
6.13.1
E to F C-Buffer Transfer
Function:
Indicates the completion of an E to F C-buffer transfer. See “Channel Status Buffer Management” on
page 53 for more information.
6.13.2
Clock Error (Bit 3)
Function:
Indicates the occurrence of a clock error condition.
6.13.3
ADC Overflow (Bit 1)
Function:
Indicates the occurrence of an ADC overflow condition.
6.13.4
ADC Underflow (Bit 0)
Function:
Indicates the occurrence of an ADC underflow condition.
DACSoft
DACZeroCross
Mode
0
Changes to affect immediately
0
1
Zero Cross enabled
1
0
Soft Ramp enabled
1
Soft Ramp and Zero Cross enabled (default)
Table 17. DAC Soft Cross or Zero Cross Mode Selection
7
65
432
10
Reserved
EFTC
ClkErr
Reserved
ADCOvfl
ADCUndrfl
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