参数资料
型号: CS42L51-CNZR
厂商: Cirrus Logic Inc
文件页数: 26/43页
文件大小: 0K
描述: IC CODEC LOW-V 24BIT 32-QFP
标准包装: 6,000
类型: 立体声音频
数据接口: PCM 音频接口
分辨率(位): 24 b
ADC / DAC 数量: 2 / 2
三角积分调变:
动态范围,标准 ADC / DAC (db): 98 / 98
电压 - 电源,模拟: 1.8V,2.5V
电压 - 电源,数字: 1.8V,2.5V
工作温度: -10°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 32-QFP
供应商设备封装: 32-QFN 裸露焊盘(5x5)
包装: 管件
配用: 598-1005-ND - BOARD EVAL FOR CS42L51 CODEC
其它名称: Q3956082
32
DS679F1
CS42L51
4.3.7
Automatic Level Control (ALC)
When enabled, the ALC monitors the analog input signal after the digital attenuator, detects when peak
levels exceed the maximum threshold settings and lowers, first, the PGA gain settings and then increases
the digital attenuation levels at a programmable attack rate and maintains the resulting level below the
maximum threshold.
When input signal levels fall below the minimum threshold, digital attenuation levels are decreased first
and the PGA gain is then increased at a programmable release rate and maintains the resulting level
above the minimum threshold.
Attack and release rates are affected by the ADC soft ramp/zero cross settings and sample rate, Fs. ALC
soft ramp and zero cross dependency may be independently enabled/disabled.
Recommended settings: Best level control may be realized with the fastest attack and slowest release
setting with soft ramp enabled in the control registers.
Note: 1.) The maximum realized gain must be set
in the PGAx_VOL register. The ALC will only apply the gain set in the PGAx_VOL.
2.) The ALC maintains
the output signal between the MIN and MAX thresholds. As the input signal level changes, the level-con-
trolled output may not always be the same but will always fall within the thresholds.
Software
Controls:
Output
(after ALC)
Input
RRATE[5:0]
PGA Gain and/or
Attenuator
ALC
MAX[2:0]
ARATE[5:0]
below full scale
MIN[2:0]
below full scale
MIN[2:0]
below full scale
MAX[2:0]
below full scale
ADCx_ATT[7:0] and
PGAx_VOL[4:0] volume
controls should NOT be
adjusted manually when
ALCx is enabled.
Figure 11. ALC
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