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参数资料
| 型号： | CS4353-CNZR |
| 厂商： | CIRRUS LOGIC INC |
| 元件分类： | DAC |
| 中文描述： | SERIAL INPUT LOADING, 24-BIT DAC, QCC24 |
| 封装： | 4 MM, LEAD FREE, QFN-24 |
| 文件页数： | 11/25页 |
| 文件大小： | 278K |
| 代理商： | CS4353-CNZR |
DS803F3
19
CS4353
4.9
Recommended Power-up and Power-down Sequences
4.9.1
Power-up Sequences
4.9.1.1
External RESET Power-up Sequence
Follow the power-up sequence below if the external RESET pin is used:
1.
Hold RESET low while the power supplies are turned on.
The VA and VCP supplies should be applied prior to or simultaneously with the VL supply. If the VL
supply is applied before the VA and VCP supplies, a DC offset will occur on the analog outputs. The
offset level is bimodal: either approximately 0.7 V below the VL supply or approximately 50 mV. The
first case can only occur if the VL supply is greater than approximately 1.2 V. Either offset level is
removed when the VA and VCP supplies are applied.
2.
Set the IS/LJ, 1_2VRMS, and DEM configuration pins to the desired state.
3.
Provide the correct MCLK, LRCK, and SCLK signals locked to the appropriate frequencies as
discussed in Section 4.3.
4.
After the power supplies, configuration pins, and clock signals are stable, bring RESET high. The
device will initiate the power-up sequence seen in Figure 9. The sequence will complete and audio
will be output from AOUTx within 50 ms after RESET is set high.
4.9.1.2
Internal Power-on Reset Power-up Sequence
Follow the power-up sequence below if the internal power-on reset is used:
1.
Hold RESET high (connected to VL) while the power supplies are turned on.
The VA and VCP supplies should be applied prior to or simultaneously with the VL supply. If the VL
supply is applied before the VA and VCP supplies, a DC offset will occur on the analog outputs. The
offset level is bimodal: either approximately 0.7 V below the VL supply or approximately 50 mV. The
first case can only occur if the VL supply is greater than approximately 1.2 V. Either offset level is
removed when the VA and VCP supplies are applied.
The power-on reset circuitry will function as described in Section 4.7.
2.
Set the IS/LJ, 1_2VRMS, and DEM configuration pins to the desired state.
3.
After the power supplies and configuration pins are stable, provide the correct MCLK, LRCK, and
SCLK signals to progress from the ‘Power-Down State’ in the power-up sequence seen in Figure 9.
The sequence will complete and audio will be output from the AOUTx pins within 50 ms after valid
clocks are applied.
4.9.2
Power-down Sequences
4.9.2.1
External RESET Power-down Sequence
Follow the power-down sequence below if the external RESET pin is used:
1.
For minimal pops, set the input digital data to zero for at least 8192 consecutive samples.
2.
Bring RESET low.
3.
Remove the power supply voltages.
4.9.2.2
Internal Power-on Reset Power-down Sequence
Follow the power-down sequence below if the internal power-on reset is used:
1.
For minimal pops, set the input digital data to zero for at least 8192 consecutive samples.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CS4353-CZZ | 功能描述:音频数/模转换器 IC 3.3V Stereo DAC w/ 2Vrms Line Driver RoHS:否 制造商:Texas Instruments 转换器数量: 分辨率:16 bit 接口类型:I2S, UBS 转换速率: 信噪比:98 dB 工作电源电压:5 V DAC 输出端数量:2 工作温度范围:- 25 C to + 85 C 电源电流:23 mA 安装风格:SMD/SMT 封装 / 箱体:TQFP-32 封装:Reel |
| CS4353-CZZR | 功能描述:音频数/模转换器 IC 3.3V Stereo DAC w/2Vrms Line Driver RoHS:否 制造商:Texas Instruments 转换器数量: 分辨率:16 bit 接口类型:I2S, UBS 转换速率: 信噪比:98 dB 工作电源电压:5 V DAC 输出端数量:2 工作温度范围:- 25 C to + 85 C 电源电流:23 mA 安装风格:SMD/SMT 封装 / 箱体:TQFP-32 封装:Reel |
| CS4353-DNZ | 功能描述:IC DAC STER 106DB 2VRMS 24-QFN RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 标准包装:2,400 系列:- 设置时间:- 位数:18 数据接口:串行 转换器数目:3 电压电源:模拟和数字 功率耗散（最大）:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:36-TFBGA 供应商设备封装:36-TFBGA 包装:带卷 (TR) 输出数目和类型:* 采样率（每秒）:* |
| CS4353-DNZR | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:3.3 V Stereo Audio DAC with 2 VRMS Line Output |
| CS4353-DZZ | 功能描述:音频数/模转换器 IC 3.3V Stereo DAC w/ 2Vrms Line Driver RoHS:否 制造商:Texas Instruments 转换器数量: 分辨率:16 bit 接口类型:I2S, UBS 转换速率: 信噪比:98 dB 工作电源电压:5 V DAC 输出端数量:2 工作温度范围:- 25 C to + 85 C 电源电流:23 mA 安装风格:SMD/SMT 封装 / 箱体:TQFP-32 封装:Reel |
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