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参数资料
| 型号： | CS4353-CNZR |
| 厂商： | CIRRUS LOGIC INC |
| 元件分类： | DAC |
| 中文描述： | SERIAL INPUT LOADING, 24-BIT DAC, QCC24 |
| 封装： | 4 MM, LEAD FREE, QFN-24 |
| 文件页数： | 13/25页 |
| 文件大小： | 278K |
| 代理商： | CS4353-CNZR |
20
DS803F3
CS4353
2.
Remove the MCLK signal without applying any glitched pulses to the MCLK pin.
3.
Remove the power supply voltages.
Note:
A glitched pulse is any pulse that is shorter than the period defined by the minimum/maximum
MCLK signal duty cycle specification and the nominal frequency of the input MCLK signal. A tran-
sient may occur on the analog outputs if the MCLK signal duty cycle specification is violated
when the MCLK signal is removed during normal operation; see “Switching Specifications - Serial
4.10
Grounding and Power Supply Arrangements
As with any high-resolution converter, the CS4353 requires careful attention to power supply and grounding
arrangements if its potential performance is to be realized. Figure 3 shows the recommended power ar-
rangements, with VCP, VA, and VL connected to clean supplies. It is strongly recommended that a single
ground plane be used, with the DGND, CPGND, and AGND pins all connected to this common plane.
Should it be necessary to split the ground planes, the DGND and CPGND pins should be connected to the
digital ground plane and the AGND pin should be connected to the analog ground plane. In this configura-
tion, it is critical that the digital and analog ground planes be tied together with a low-impedance connection,
ideally a strip of copper on the printed circuit board, at a single point near the CS4353.
All signals, especially clocks, should be kept away from the VBIAS pin in order to avoid unwanted coupling
into the DAC.
4.10.1
Capacitor Placement
Decoupling capacitors should be placed as close to the device as possible, with the low-value ceramic
capacitor being the closest. To further minimize impedance, these capacitors should be located on the
same PCB layer as the device. If desired, all supply pins may be connected to the same supply, but a
decoupling capacitor should still be placed on each supply pin. See DC Electrical Characteristics for the
voltage present across pin pairs. This is useful for choosing appropriate capacitor voltage ratings and ori-
entation if electrolytic capacitors are used.
The CDB4353 evaluation board demonstrates the optimum layout and power supply arrangements.
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| CS4353-CZZ | 功能描述:音频数/模转换器 IC 3.3V Stereo DAC w/ 2Vrms Line Driver RoHS:否 制造商:Texas Instruments 转换器数量: 分辨率:16 bit 接口类型:I2S, UBS 转换速率: 信噪比:98 dB 工作电源电压:5 V DAC 输出端数量:2 工作温度范围:- 25 C to + 85 C 电源电流:23 mA 安装风格:SMD/SMT 封装 / 箱体:TQFP-32 封装:Reel |
| CS4353-CZZR | 功能描述:音频数/模转换器 IC 3.3V Stereo DAC w/2Vrms Line Driver RoHS:否 制造商:Texas Instruments 转换器数量: 分辨率:16 bit 接口类型:I2S, UBS 转换速率: 信噪比:98 dB 工作电源电压:5 V DAC 输出端数量:2 工作温度范围:- 25 C to + 85 C 电源电流:23 mA 安装风格:SMD/SMT 封装 / 箱体:TQFP-32 封装:Reel |
| CS4353-DNZ | 功能描述:IC DAC STER 106DB 2VRMS 24-QFN RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 标准包装:2,400 系列:- 设置时间:- 位数:18 数据接口:串行 转换器数目:3 电压电源:模拟和数字 功率耗散（最大）:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:36-TFBGA 供应商设备封装:36-TFBGA 包装:带卷 (TR) 输出数目和类型:* 采样率（每秒）:* |
| CS4353-DNZR | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:3.3 V Stereo Audio DAC with 2 VRMS Line Output |
| CS4353-DZZ | 功能描述:音频数/模转换器 IC 3.3V Stereo DAC w/ 2Vrms Line Driver RoHS:否 制造商:Texas Instruments 转换器数量: 分辨率:16 bit 接口类型:I2S, UBS 转换速率: 信噪比:98 dB 工作电源电压:5 V DAC 输出端数量:2 工作温度范围:- 25 C to + 85 C 电源电流:23 mA 安装风格:SMD/SMT 封装 / 箱体:TQFP-32 封装:Reel |
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