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参数资料
| 型号： | CS4353-CNZR |
| 厂商： | CIRRUS LOGIC INC |
| 元件分类： | DAC |
| 中文描述： | SERIAL INPUT LOADING, 24-BIT DAC, QCC24 |
| 封装： | 4 MM, LEAD FREE, QFN-24 |
| 文件页数： | 5/25页 |
| 文件大小： | 278K |
| 代理商： | CS4353-CNZR |
DS803F3
13
CS4353
4. APPLICATIONS
4.1
Line Outputs
4.1.1
Ground-centered Outputs
An on-chip charge pump creates both positive and negative high-voltage supplies, which allows the full-
scale output swing to be centered around ground. This eliminates the need for large DC-blocking capac-
itors which create audible pops at power-on, allows the CS4353 to deliver a larger full-scale output at low-
er supply voltages, and provides improved bandwidth frequency response.
4.1.2
Full-scale Output Amplitude Control
The full-scale output voltage amplitude is selected via the 1_2VRMS pin. When the pin is connected to
VL, the full-scale output voltage at the AOUTx pins is approximately 2 VRMS. When the pin is connected
to GND, the full-scale output voltage at the AOUTx pins is approximately 1 VRMS. Additional impedance
between the AOUTx pin and the load will lower the voltage delivered to the load. See the DAC Analog
Characteristics table for the complete specifications of the full-scale output voltage.
4.1.3
Pseudo-differential Outputs
The CS4353 implements a pseudo-differential output stage. The AOUT_REF input is intended to be used
as a pseudo-differential reference signal. This feature provides common mode noise rejection with single-
ended signals. Figure 4 shows a basic diagram outlining the internal implementation of the pseudo-differ-
ential output stage, including a recommended stereo pseudo-differential output topology. If pseudo-differ-
ential output functionality is not required, simply connect the AOUT_REF pin to ground next to the
CS4353. If a split-ground design is used, the AOUT_REF pin should be connected to AGND. See the Ab-
solute Maximum Ratings table for the maximum allowable voltage on the AOUT_REF pin. Applying a DC
voltage on the AOUT_REF pin will cause a DC offset on the DAC output.
Internal Left
DAC Signal
AOUTA
AOUT_REF
//
Left Output
GND
(pseudo-differential traces)
AOUTB
//
Right Output
(pseudo-differential traces)
Internal Right
DAC Signal
Psuedo-differential output improves common
mode rejection, reducing external system noise
Figure 4. Stereo Pseudo-differential Output
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| CS4353-CZZ | 功能描述:音频数/模转换器 IC 3.3V Stereo DAC w/ 2Vrms Line Driver RoHS:否 制造商:Texas Instruments 转换器数量: 分辨率:16 bit 接口类型:I2S, UBS 转换速率: 信噪比:98 dB 工作电源电压:5 V DAC 输出端数量:2 工作温度范围:- 25 C to + 85 C 电源电流:23 mA 安装风格:SMD/SMT 封装 / 箱体:TQFP-32 封装:Reel |
| CS4353-CZZR | 功能描述:音频数/模转换器 IC 3.3V Stereo DAC w/2Vrms Line Driver RoHS:否 制造商:Texas Instruments 转换器数量: 分辨率:16 bit 接口类型:I2S, UBS 转换速率: 信噪比:98 dB 工作电源电压:5 V DAC 输出端数量:2 工作温度范围:- 25 C to + 85 C 电源电流:23 mA 安装风格:SMD/SMT 封装 / 箱体:TQFP-32 封装:Reel |
| CS4353-DNZ | 功能描述:IC DAC STER 106DB 2VRMS 24-QFN RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 标准包装:2,400 系列:- 设置时间:- 位数:18 数据接口:串行 转换器数目:3 电压电源:模拟和数字 功率耗散（最大）:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:36-TFBGA 供应商设备封装:36-TFBGA 包装:带卷 (TR) 输出数目和类型:* 采样率（每秒）:* |
| CS4353-DNZR | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:3.3 V Stereo Audio DAC with 2 VRMS Line Output |
| CS4353-DZZ | 功能描述:音频数/模转换器 IC 3.3V Stereo DAC w/ 2Vrms Line Driver RoHS:否 制造商:Texas Instruments 转换器数量: 分辨率:16 bit 接口类型:I2S, UBS 转换速率: 信噪比:98 dB 工作电源电压:5 V DAC 输出端数量:2 工作温度范围:- 25 C to + 85 C 电源电流:23 mA 安装风格:SMD/SMT 封装 / 箱体:TQFP-32 封装:Reel |
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