参数资料
型号: CS5364-DQZ
厂商: Cirrus Logic Inc
文件页数: 28/42页
文件大小: 0K
描述: IC ADC 4CH 114DB 216KHZ 48-LQFP
标准包装: 250
位数: 24
采样率(每秒): 216k
数据接口: 串行
转换器数目: 1
功率耗散(最大): 580mW
电压电源: 模拟和数字
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 管件
输入数目和类型: 4 个差分,单极
产品目录页面: 755 (CN2011-ZH PDF)
配用: CDB5364-ND - EVALUATION BOARD FOR CS5364
其它名称: 598-1697
34
DS625F4
CS5364
5.6
04h (HPF) High-Pass Filter Register
Default: 0x00, all high-pass filters enabled.
The High-Pass Filter Register is used to enable or disable a high-pass filter that exists for each channel.
These filters are used to perform DC offset calibration, a procedure that is detailed in “DC Offset Control”
5.7
05h Reserved
5.8
06h (PDN) Power Down Register
Default: 0x00 - everything powered up
The Power Down Register is used as needed to reduce the chip’s power consumption.
Bit[7] RESERVED
Bit[6] RESERVED
Bit[5] PDN-BG When set, this bit powers-down the bandgap reference.
Bit[4] PDN-OSC controls power to the internal oscillator core. When asserted, the internal oscillator core is
shut down, and no clock is supplied to the chip. If the chip is running off an externally supplied clock at the
MCLK pin, it is also prevented from clocking the device internally.
Bit[1:0] PDN When any bit is set, all clocks going to a channel pair are turned off, and the serial data outputs
are forced to all zeroes.
5.9
07h Reserved
5.10
08h (MUTE) Mute Control Register
Default: 0x00, no channels are muted.
The Mute Control Register is used to mute or unmute the serial audio data output of individual channels.
When a bit is set, that channel’s serial data is muted by forcing the output to all zeroes.
R/W
765
43
210
R/W
RESERVED RESERVED RESERVED RESERVED
HPF4
HPF3
HPF2
HPF1
R/W
765
43
210
RESERVED
-
R/W
765
43
210
R/W
RESERVED
PDN-BG
PDN-OSC
RESERVED RESERVED
PDN43
PDN21
R/W
765
43
210
RESERVED
-
R/W
765
43
210
R/W
RESERVED RESERVED RESERVED RESERVED
MUTE4
MUTE3
MUTE2
MUTE1
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