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参数资料
| 型号： | CS5463-IS |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 14/46页 |
| 文件大小： | 0K |
| 描述： | IC PWR/ENERGY METER 2CH 24-SSOP |
| 标准包装： | 59 |
| 输入阻抗： | 30 千欧 |
| 测量误差： | 0.1% |
| 电压 - 高输入/输出： | 0.8V |
| 电压 - 低输入/输出： | 0.2V |
| 电流 - 电源： | 2.9mA |
| 电源电压： | 4.75 V ~ 5.25 V |
| 测量仪表类型： | 单相 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 24-SSOP |
| 包装： | 管件 |
| 配用： | 598-1553-ND - BOARD EVAL & SOFTWARE CS5463 ADC |
| 其它名称： | 598-1192-5 |
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CS5463
Digital Filter
V DCoff * V gn *
APF
VOLTAGE
x10
2nd Order
??
Modulator
DELAY
REG
SINC 3
X
DELAY
REG
IIR
+
?
+
X
HPF
V*
V Q *
X
+
?
X
Q*
6
? *
X
+
?
PC6 PC5 PC4 PC3 PC2 PC1 PC0
Configuration Register *
SYS Gain *
2322
... XVDEL XIDEL VHPF IHPF
8 7 6 5
Operational Modes Register *
IIR
4
3 2 1 0
X
P*
2 ?
X
?
CURRENT
PGA
4th Order
??
Modulator
SINC 3
DELAY
REG
Digital Filter
DELAY
REG
IIR
+
+
I DCoff *
X
I gn *
HPF
APF
I*
* DENOTES REGISTER NAME.
Figure 3. Data Measurement Flow Diagram.
4. THEORY OF OPERATION
The CS5463 is a dual-channel analog-to-digital convert-
er (ADC) followed by a computation engine that per-
forms power calculations and energy-to-pulse
conversion. The data flow for the voltage and current
channel measurement and the power calculation algo-
rithms are depicted in Figure 3 and 4, respectively.
The analog inputs are structured with two dedicated
channels, Voltage and Current , then optimized to simpli-
fy interfacing to various sensing elements.
The voltage-sensing element introduces a voltage
waveform on the voltage channel input VIN± and is sub-
ject to a gain of 10x. A second-order delta-sigma modu-
lator samples the amplified signal for digitization.
Simultaneously, the current-sensing element introduces
a voltage waveform on the current channel input IIN±
and is subject to two selectable gains of the program-
mable gain amplifier (PGA). The amplified signal is
sampled by a fourth-order delta-sigma modulator for
from the calculated V RMS and I RMS as well as the appar-
ent power.
When the optional HPF in either channel is disabled, an
all-pass filter (APF) is implemented. The APF has an
amplitude response that is flat within the channel band-
width and is used for matching phase in systems where
only one HPF is engaged.
4.2 Voltage and Current Measurements
The digital filter output word is then subject to a DC off-
set adjustment and a gain calibration (See Section 7.
System Calibration on page 37). The calibrated mea-
surement is available by reading the instantaneous volt-
age and current registers.
The Root Mean Square ( RMS in Figure 4) calculations
are performed on N instantaneous voltage and current
samples, V n and I n , respectively (where N is the cycle
count), using the formula:
digitization. Both converters sample at a rate of
MCLK/8, the over-sampling provides a wide dynamic
range and simplified anti-alias filter design.
4.1 Digital Filters
I RMS =
N – 1
? In
n = 0
---------------------
N
The decimating digital filters on both channels are Sinc 3
filters followed by 4th-order IIR filters. The single-bit
data is passed to the low-pass decimation filter and out-
put at a fixed word rate. The output word is passed to an
optional IIR filter to compensate for the magnitude roll
off of the low-pass filtering operation.
An optional digital high-pass filter ( HPF in Figure 3) re-
moves any DC component from the selected signal
path. By removing the DC component from the voltage
and/or the current channel, any DC content will also be
removed from the calculated active power as well. With
both HPFs enabled the DC component will be removed
14
and likewise for V RMS , using V n . I RMS and V RMS are ac-
cessible by register reads, which are updated once ev-
ery cycle count (referred to as a computational cycle).
4.3 Power Measurements
The instantaneous voltage and current samples are
multiplied to obtain the instantaneous power (see Fig-
ure 3). The product is then averaged over N conver-
sions to compute active power and is used to drive
energy pulse output E1. Energy output E2 is selectable,
providing an energy sign or a pulse output that is pro-
portional to the apparent power. Energy output E3
DS678F3
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CS5463-ISZ | 功能描述:电流和电力监控器、调节器 Single Phase Power/Energy IC RoHS:否 制造商:STMicroelectronics 产品:Current Regulators 电源电压-最大:48 V 电源电压-最小:5.5 V 工作温度范围:- 40 C to + 150 C 安装风格:SMD/SMT 封装 / 箱体:HPSO-8 封装:Reel |
| CS5463-ISZ/D | 制造商:Cirrus Logic 功能描述: |
| CS5463-ISZR | 功能描述:电流和电力监控器、调节器 IC Single Phase PWR/Energy RoHS:否 制造商:STMicroelectronics 产品:Current Regulators 电源电压-最大:48 V 电源电压-最小:5.5 V 工作温度范围:- 40 C to + 150 C 安装风格:SMD/SMT 封装 / 箱体:HPSO-8 封装:Reel |
| CS5463-ISZR/E2 | 制造商:Cirrus Logic 功能描述: |
| CS5464 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:Three-channel, Single-phase Power/Energy IC |
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