参数资料
型号: CS5463-IS
厂商: Cirrus Logic Inc
文件页数: 6/46页
文件大小: 0K
描述: IC PWR/ENERGY METER 2CH 24-SSOP
标准包装: 59
输入阻抗: 30 千欧
测量误差: 0.1%
电压 - 高输入/输出: 0.8V
电压 - 低输入/输出: 0.2V
电流 - 电源: 2.9mA
电源电压: 4.75 V ~ 5.25 V
测量仪表类型: 单相
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.209",5.30mm 宽)
供应商设备封装: 24-SSOP
包装: 管件
配用: 598-1553-ND - BOARD EVAL & SOFTWARE CS5463 ADC
其它名称: 598-1192-5
CS5463
2. PIN DESCRIPTION
Crystal Out
CPU Clock Output
Positive Digital Supply
Digital Ground
Serial Clock
Serial Data Ouput
Chip Select
Mode Select
Differential Voltage Input
Differential Voltage Input
XOUT
CPUCLK
VD+
DGND
SCLK
SDO
CS
MODE
VIN+
VIN-
1
2
3
4
5
6
7
8
9
10
24
23
22
21
20
19
18
17
16
15
XIN
SDI
E2
E1
INT
RESET
E3
PFMON
IIN+
IIN-
Crystal In
Serial Data Input
Energy Output 2
Energy Output 1
Interrupt
Reset
High Frequency Energy Output
Power Fail Monitor
Differential Current Input
Differential Current Input
Voltage Reference Output VREFOUT
11
14
VA+
Positive Analog Supply
Voltage Reference Input
VREFIN
12
13
AGND
Analog Ground
Clock Generator
Crystal Out
Crystal In
CPU Clock Output
Control Pins and Serial Data I/O
Serial Clock Input
Serial Data Output
Chip Select
Mode Select
1,24
2
5
6
7
8
XOUT, XIN – The output and input of an inverting amplifier. Oscillation occurs when connected to
a crystal, providing an on-chip system clock. Alternatively, an external clock can be supplied to
the XIN pin to provide the system clock for the device.
CPUCLK – Output of on-chip oscillator which can drive one standard CMOS load.
SCLK – A Schmitt-trigger input pin. Clocks data from the SDI pin into the receive buffer and out
of the transmit buffer onto the SDO pin when CS is low.
SDO – Serial port data output pin.SDO is forced into a high-impedance state when CS is high.
CS – Low, activates the serial port interface.
MODE - High, enables the “auto-boot” mode. The mode pin has an internal pull-down resistor.
Energy Output
18,21,22 E3, E1, E2 – Active-low pulses with an output frequency proportional to the selected power. Con-
figurable outputs for active, apparent, and reactive power, negative energy indication, zero cross
detection, and power failure monitoring. E1, E2, E3 outputs are configured in the Operational
Modes Register.
Reset
Interrupt
Serial Data Input
Analog Inputs/Outputs
Differential Voltage Inputs
Differential Current Inputs
Voltage Reference Output
Voltage Reference Input
Power Supply Connections
Positive Digital Supply
Digital Ground
Positive Analog Supply
Analog Ground
Power Fail Monitor
6
19
20
23
9,10
15,16
11
12
3
4
14
13
1 7
RESET – A Schmitt-trigger input pin. Low activates Reset, all internal registers (some of which
drive output pins) are set to their default states.
INT - Low, indicates that an enabled event has occurred.
SDI - Serial port data input pin. Data will be input at a rate determined by SCLK.
VIN+, VIN- – Differential analog input pins for the voltage channel.
IIN+, IIN- – Differential analog input pins for the current channel.
VREFOUT – The on-chip voltage reference output. The voltage reference has a nominal magni-
tude of 2.5 V and is referenced to the AGND pin on the converter.
VREFIN – The input to this pin establishes the voltage reference for the on-chip modulator.
VD + – The positive digital supply.
DGND – Digital Ground.
VA+ – The positive analog supply.
AGND – Analog ground.
PFMON – The power fail monitor pin monitors the analog supply. If the analog supply does not
meet or falls below PFMON’s voltage threshold, a Low-supply Detect (LSD) event is set in the
status register.
DS678F3
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