参数资料
型号: CS5530-ISZR
厂商: Cirrus Logic Inc
文件页数: 11/36页
文件大小: 0K
描述: IC ADC 24BIT 1CH W/LNA 20-SSOP
标准包装: 1,000
位数: 24
采样率(每秒): 3.84k
数据接口: 串行
转换器数目: 1
功率耗散(最大): 45mW
电压电源: 模拟和数字,双 ±
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-SSOP(0.209",5.30mm 宽)
供应商设备封装: 20-SSOP
包装: 带卷 (TR)
输入数目和类型: 1 个差分,单极;1 个差分,双极
配用: 598-1158-ND - BOARD EVAL FOR CS5530
CS5530
DS742F3
19
2.3.10 Configuration Register Description
PSS (Power Save Select)[31]
0
Standby Mode (Oscillator active, allows quick power-up).
1
Sleep Mode (Oscillator inactive).
PDW (Power Down Mode)[30]
0
Normal Mode
1
Activate the power save select mode.
RS (Reset System)[29]
0
Normal Operation.
1
Activate a Reset cycle. See System Reset Sequence in the datasheet text.
RV (Reset Valid)[28]
0
Normal Operation
1
System was reset. This bit is read only. Bit is cleared to logic zero after the configuration register is read.
IS (Input Short)[27]
0
Normal Input
1
All signal input pairs for each channel are disconnected from the pins and shorted internally.
NU (Not Used)[26]
0
Must always be logic 0. Reserved for future upgrades.
VRS (Voltage Reference Select)[25]
0
2.5 V < VREF ≤ [(VA+) - (VA-)]
11 V
≤ VREF ≤ 2.5V
A1-A0 (Output Latch bits)[24:23]
The latch bits (A1 and A0) will be set to the logic state of these bits when the Configuration register is written.
Note that these logic outputs are powered from VA+ and VA-.
00
A1 = 0, A0 = 0
01
A1 = 0, A0 = 1
10
A1 = 1, A0 = 0
11
A1 = 1, A0 = 1
NU (Not Used)[22:20]
0
Must always be logic 0. Reserved for future upgrades.
Filter Rate Select, FRS[19]
0
Use the default output word rates.
1
Scale all output word rates and their corresponding filter characteristics by a factor of 5/6.
NU (Not Used)[18:15]
0
Must always be logic 0. Reserved for future upgrades.
D31(MSB)
D30
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
PSS
PDW
RS
RV
IS
NU
VRS
A1
A0
NU
FRS
NU
D15
D14
D13
D12
D11
D10
D9
D8
D7D6
D5
D4D3D2D1D0
NU
WR3
WR2
WR1
WR0 UP/BP
OCD
NUNUNUNUNUNUNUNUNU
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