参数资料
| 型号： | CS5530-ISZR |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 17/36页 |
| 文件大小： | 0K |
| 描述： | IC ADC 24BIT 1CH W/LNA 20-SSOP |
| 标准包装： | 1,000 |
| 位数： | 24 |
| 采样率（每秒）： | 3.84k |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 45mW |
| 电压电源： | 模拟和数字，双 ± |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 20-SSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个差分，单极；1 个差分，双极 |
| 配用： | 598-1158-ND - BOARD EVAL FOR CS5530 |
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CS5530
24
DS742F3
2.5.2 Continuous Conversion Mode
When the user transmits the perform continuous
conversion command, the converter begins contin-
uous conversions using the word rate and polarity
selections set in the configuration register. Once
the command byte is transmitted, the serial port en-
ters data mode where it waits until a conversion is
complete. After the conversion is done, SDO falls
to logic 0 to act as a flag to indicate that the data is
available. Forty SCLKs are then needed to read the
conversion. The first 8 SCLKs are used to clear the
SDO flag. The last 32 SCLKs are needed to read
the conversion result. If ‘00000000’ is provided to
SDI during the first 8 SCLKs when the SDO flag is
cleared, the converter remains in this conversion
mode and continues to convert using the same word
rate and polarity information. In continuous con-
version mode, not every conversion word needs to
be read. The user needs only to read the conversion
words required for the application as SDO rises and
falls to indicate the availability of new conversion
data. Note that if a conversion is not read before the
next conversion data becomes available, it will be
lost and replaced by the new conversion data. To
exit this conversion mode, the user must provide
‘11111111’ to the SDI pin during the first 8 SCLKs
after SDO falls. If the user decides to exit, 32
SCLKs are required to clock out the last conversion
before the converter returns to command mode.
The number of clock cycles a continuous conver-
sion takes for each Output Word Setting is listed in
Table 2. The first conversion from the part in con-
tinuous conversion mode will be longer than the
following conversions due to start-up overhead.
The ± 8 (FRS = 0) or ± 10 (FRS = 1) clock ambigu-
ity is due to internal synchronization between the
SCLK input and the oscillator.
Note:
When changing channels, or after performing
calibrations and/or single conversions, the
user must ignore the first three (for OWRs
less than 3200 Sps, MCLK = 4.9152 MHz) or
first five (for OWR
≥ 3200 Sps) conversions in
continuous conversion mode, as residual
filter coefficients must be flushed from the
filter before accurate conversions are
performed.
Table 1. Conversion Timing for Single Mode
(WR3-WR0)
Clock Cycles
FRS = 0
FRS = 1
0000
171448 ± 8
205738 ± 10
0001
335288 ± 8
402346 ± 10
0010
662968 ± 8
795562 ± 10
0011
1318328 ± 8
1581994 ± 10
0100
2629048 ± 8
3154858 ± 10
1000
7592 ± 8
9110 ± 10
1001
17848 ± 8
21418 ± 10
1010
28088 ± 8
33706 ± 10
1011
48568 ± 8
58282 ± 10
1100
89528 ± 8
107434 ± 10
Table 2. Conversion Timing for Continuous Mode
FRS (WR3-WR0)
Clock Cycles
(First Conversion)
Clock Cycles
(All Other
Conversions)
0
0000
89528 ± 8
40960
0
0001
171448 ± 8
81920
0
0010
335288 ± 8
163840
0
0011
662968 ± 8
327680
0
0100
1318328 ± 8
655360
0
1000
2472 ± 8
1280
0
1001
12728 ± 8
2560
0
1010
17848 ± 8
5120
0
1011
28088 ± 8
10240
0
1100
48568 ± 8
20480
1
0000
107434 ± 10
49152
1
0001
205738 ± 10
98304
1
0010
402346 ± 10
196608
1
0011
795562 ± 10
393216
1
0100
1581994 ± 10
786432
1
1000
2966 ± 10
1536
1
1001
15274 ± 10
3072
1
1010
21418 ± 10
6144
1
1011
33706 ± 10
12288
1
1100
58282 ± 10
24576
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相关代理商/技术参数 |
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| CS5531 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA |
| CS5531_08 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:16-bit and 24-bit ADCs with Ultra-low-noise PGIA |
| CS5531-AS | 功能描述:模数转换器 - ADC 2-Ch 16-Bit ADCs w/ Ultra Low Noise PGIA RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| CS5531-ASR | 功能描述:模数转换器 - ADC IC 16-Bit ADCs w/UltraLw Noise PGIA RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| CS5531-ASZ | 功能描述:模数转换器 - ADC 2-Ch 16-Bit ADCs w/ Ultra Low Noise PGIA RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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