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参数资料
| 型号： | CS7620-IQ |
| 厂商： | CIRRUS LOGIC INC |
| 元件分类： | 消费家电 |
| 英文描述： | CCD IMAGER ANALOG PROCESSOR |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封装： | 10 X 10 X 1.40 MM, MS-026, TQFP-64 |
| 文件页数： | 35/70页 |
| 文件大小： | 1032K |
| 代理商： | CS7620-IQ |
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CS7620
DS301PP2
35
4.12
Gain Calibration - Offset 3
Default = 00h; Read/Write (address 11h)
Gain Calibration - Fix Gains
Default = 00h; Read/Write (address 16h)
Bit Number
7
6
5
4
3
2
1
0
Bit Name
gain_offset
37
0
gain_offset
36
0
gain_offset
35
0
gain_offset
34
0
gain_offset
33
0
gain_offset
32
0
gain_offset
31
0
gain_offset
30
0
Default
Bit
Mnemonic
Function
7
gain_offset37
Gain Calibration Offset 3:
Offset added to 1x gain segment. Values are in
2’s complement.
These registers are used to report some of the calibration settings. After cal-
ibration is performed the gain offset registers are automatically updated with
values needed for the DRX circuitry to operate correctly. These registers
should not be written to since this will remove the proper settings found during
calibration. The gain offset values are used to add an offset to the output of
the ADC when using different analog gain settings (See equations below).
The purpose of this is to produce a continuous transition between the different
gain settings so that the final 13 bit output is monotonic and has no undesired
artifacts. (See Figure 26)
{ADC_outif in the 8x gain segment}
dout[12:0] ={ADC_out*2+Offset1if in the 4x gain segment}
{ADC_out*4+Offset2*2if in the 2x gain segment}
{ADC_out*8+Offset3*4if in the 1x gain segment}
6
gain_offset36
5
gain_offset35
4
gain_offset34
3
gain_offset33
2
gain_offset32
1
gain_offset31
0
gain_offset30
Bit Number
Bit Name
Default
7
6
5
4
3
2
1
0
Reserved
fixed_gain2
0
fixed_gain1
0
fixed_gain0
0
Reserved
-
-
-
-
-
Bit
Mnemonic
Function
7:6
-
Reserved
Fixed Gain:
This is used to turn off the DRX functionality and apply a fixed
gain to the input before reaching the ADC. A setting of 000 is used for normal
operation this will yield the largest dynamic range by switching the front end
gain relative to the amplitude of the input signal. The settings 001, 010, 011,
and 100 are for fixed gains of 1x, 2x, 4x, and 8x respectively. Figure 27 shows
the transfer function of the output of the ADC for a given input with the various
fixed gain settings.
Reserved
5
fixed_gain2
4
fixed_gain1
3
fixed_gain0
2:0
-
相关PDF资料 |
PDF描述 |
|---|---|
| CS7622 | CCD Imager Analog Processor |
| CS7622-IQ | CCD Imager Analog Processor |
| CS7654 | CCD COLOR SPACE PROCESSOR WITH ANALOG OUTPUT |
| CS7654-KQ | CCD COLOR SPACE PROCESSOR WITH ANALOG OUTPUT |
| CS7666 | DIGITAL COLOR-SPACE PROCESSOR FOR CCD CAMERAS |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CS7621-4 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Optoelectronic |
| CS7622 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:CCD Imager Analog Processor |
| CS7622-IQ | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:CCD Imager Analog Processor |
| CS7631-4 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Optoelectronic |
| CS7636-000 | 制造商:TE Connectivity 功能描述:55A4122-22-6/9-9CS2275 |
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