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参数资料
| 型号： | CY28317PVXC-2T |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 16/20页 |
| 文件大小： | 0K |
| 描述： | IC CLK FTG VIA PL/E133T 48SSOP |
| 标准包装： | 1,000 |
| 类型： | 时钟/频率发生器 |
| PLL： | 是 |
| 输入： | 晶体 |
| 输出： | HCSL，LVCMOS |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:20 |
| 差分 - 输入:输出： | 无/是 |
| 频率 - 最大： | 248MHz |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-BSSOP（0.295"，7.50mm 宽） |
| 供应商设备封装： | 48-SSOP |
| 包装： | 带卷 (TR) |
CY28317-2
....................... Document #: 38-07094 Rev. *B Page 5 of 20
Table 4. Word Read and Word Write Protocol
Word Write Protocol
Word Read Protocol
Bit
Description
Bit
Description
1Start
2:8
Slave address – 7 bits
2:8
Slave address – 7 bits
9Write
10
Acknowledge from slave
10
Acknowledge from slave
11:18
Command Code – 8 bits
‘1xxxxxxx’ stands for byte or word operation
bit[6:0] of the command code represents the
offset of the byte to be accessed
11:18
Command Code – 8 bits
‘1xxxxxxx’ stands for byte or word operation
bit[6:0] of the command code represents the
offset of the byte to be accessed
19
Acknowledge from slave
19
Acknowledge from slave
20:27
Data byte low – 8 bits
20
Repeat start
28
Acknowledge from slave
21:27
Slave address – 7 bits
29:36
Data byte high – 8 bits
28
Read
37
Acknowledge from slave
29
Acknowledge from slave
38
Stop
30:37
Data byte low from slave – 8 bits
38
Acknowledge
39:46
Data byte high from slave – 8 bits
47
Not acknowledge
48
Stop
Table 5. Byte Read and Byte Write Protocol
Byte Write Protocol
Byte Read Protocol
Bit
Description
Bit
Description
1Start
2:8
Slave address – 7 bits
2:8
Slave address – 7 bits
9Write
10
Acknowledge from slave
10
Acknowledge from slave
11:18
Command Code – 8 bits
‘1xxxxxxx’ stands for byte operation
bit[6:0] of the command code represents the
offset of the byte to be accessed
11:18
Command Code – 8 bits
‘1xxxxxxx’ stands for byte operation
bit[6:0] of the command code represents the
offset of the byte to be accessed
19
Acknowledge from slave
19
Acknowledge from slave
20:27
Data byte – 8 bits
20
Repeat start
28
Acknowledge from slave
21:27
Slave address – 7 bits
29
Stop
28
Read
29
Acknowledge from slave
30:37
Data byte from slave – 8 bits
38
Not acknowledge
39
Stop
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CY28317ZC-2 | 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:FTG for Mobile VIA PL133T and PLE133T Chipsets |
| CY28317ZC-2T | 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:FTG for Mobile VIA PL133T and PLE133T Chipsets |
| CY28322 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Clocks and Buffers |
| CY28322-2 | 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:133-MHz Spread Spectrum Clock Synthesizer with Differential CPU Outputs |
| CY28322ZC-2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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