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参数资料
| 型号： | CY7C1371BV25-83BGC |
| 厂商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分类： | SRAM |
| 英文描述： | 512K X 36 ZBT SRAM, 10 ns, PBGA119 |
| 封装： | 14 X 22 MM, 2.40 MM HEIGHT, PLASTIC, BGA-119 |
| 文件页数： | 8/25页 |
| 文件大小： | 709K |
| 代理商： | CY7C1371BV25-83BGC |
CY7C1373BV25
CY7C1371BV25
Document #: 38-05250 Rev. *A
Page 16 of 25
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature
..................................... 65°C to +150°C
Ambient Temperature with
Power Applied
.................................................. 55°C to +125°C
Supply Voltage on VDD Relative to GND.........0.5V to +3.6V
DC Voltage Applied to Outputs
in High Z State[13]
....................................0.5V to V
DDQ + 0.5V
DC Input Voltage[13]
................................0.5V to V
DDQ + 0.5V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage ......................................... > 1500V
(per MIL-STD-883, Method 3015)
Latch-up Current.................................................... > 200 mA
Operating Range
Range
Ambient Temperature[12]
VDD/VDDQ
[16]
Commercial
0
°C to +70°C
2.5V
± 5%
Industrial
-40
°C to +85°C
Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
Min.
Max.
Unit
VDD/VDDQ
Power Supply Voltage
2.375
2.625
V
VOH
Output HIGH Voltage
VDD = Min., IOH = 1.0 mA
[14]
2.0
V
VOL
Output LOW Voltage
VDD = Min., IOL = 1.0 mA
[14]
0.4
V
VIH
Input HIGH Voltage
1.7
V
VIL
Input LOW Voltage[13]
0.3
0.7
V
IX
Input Load Current
GND
≤ V
I ≤ VDDQ
5
A
Input Current of MODE
30
A
Input Current of ZZ
Input = Vss
-30
30
IOZ
Output Leakage Current
GND
≤ V
I ≤ VDDQ, Output Disabled
5
A
IDD
VDD Operating Supply
VDD = Max., IOUT = 0 mA,
f = fMAX = 1/tCYC
8.5-ns cycle, 117 MHz
210
mA
10-ns cycle, 100 MHz
190
mA
12-ns cycle, 83 MHz
160
mA
ISB1
Automatic CE
Power-Down
Current—TTL Inputs
Max. VDD, Device Deselected,
VIN ≥ VIH or VIN ≤ VIL
f = fMAX = 1/tCYC
8.5-ns cycle, 117 MHz
85
mA
10-ns cycle, 100 MHz
70
mA
12-ns cycle, 83 MHz
65
mA
ISB2
Automatic CE
Power-Down
Current—CMOS Inputs
Max. VDD, Device Deselected,
VIN ≤ 0.3V or VIN > VDDQ 0.3V,
f
= 0
All speed grades
30
mA
ISB3
Automatic CE
Power-Down
Current—CMOS Inputs
Max. VDD, Device Deselected, or
VIN ≤ 0.3V or VIN > VDDQ 0.3V,
f = fMAX = 1/tCYC
8.5-ns cycle, 117 MHz
60
mA
10-ns cycle, 100 MHz
50
mA
12-ns cycle, 83 MHz
55
mA
ISB4
Automatic CE
Power-Down
Current—TTL Inputs
Max. VDD, Device Deselected,
VIN ≥ VIH or VIN ≤ VIL, f = 0
All speed grades
50
mA
Capacitance[15]
Parameter
Description
Test Conditions
Max.
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz,
VDD = VDDQ = 2.5V
3
pF
CCLK
Clock Input Capacitance
3
pF
CI/O
Input/Output Capacitance
3
pF
Notes:
12. TA is the case temperature.
13. Minimum voltage equals
2.0V for pulse durations of less than 20 ns.
14. The load used for VOH and VOL testing is shown in figure (b) of the AC Test Loads.
15. Tested initially and after any design or process change that may affect these parameters.
16. Power Supply ramp up should be monotonic.
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