- 您现在的位置：买卖IC网 > PDF目录170654 > DAC8554IPWR (TEXAS INSTRUMENTS INC) SERIAL INPUT LOADING, 12 us SETTLING TIME, 16-BIT DAC, PDSO16 PDF资料下载
参数资料
| 型号： | DAC8554IPWR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 12 us SETTLING TIME, 16-BIT DAC, PDSO16 |
| 封装： | GREEN, PLASTIC, TSSOP-16 |
| 文件页数： | 14/31页 |
| 文件大小： | 1039K |
| 代理商： | DAC8554IPWR |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页当前第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页
www.ti.com
LDAC FUNCTIONALITY
ENABLE PIN
SLAS431B – JUNE 2005 – REVISED OCTOBER 2006
channels must be loaded with desired data before
LDAC
is
triggered.
After
a
low-to-high
LDAC
The DAC8554 offers both a software and hardware
transition, all DACs are simultaneously updated with
simultaneous
update
function.
The
DAC8554
the contents of the corresponding data buffers. If the
double-buffered architecture has been designed so
contents of a data buffer are not changed by the
that new data can be entered for each DAC without
serial interface, the corresponding DAC output will
disturbing
the
analog
outputs.
The
software
remain unchanged after the LDAC trigger.
simultaneous update capability is controlled by the
load 1 (LD1) and load 0 (LD0) control bits. By setting
load 1 = 1, all of the DAC registers will be updated
on the falling edge of the 24th clock signal. When the
For normal operation, the enable pin must be tied to
new data has been entered into the device, all of the
a logic low. If the enable pin is tied high, the
DAC outputs can be updated simultaneously and
DAC8554 stops listening to the serial port. This
synchronously with the clock.
feature can be useful for applications that share the
same serial port.
DAC8554 data updates are synchronized with the
falling edge of the 24th SCLK cycle, which follows a
falling
edge
of
SYNC.
For
such
synchronous
updates, the LDAC pin is not required and it must be
connected to GND permanently. The LDAC pin is
used as a positive edge triggered timing signal for
asynchronous DAC updates. Data buffers of all
21
相关PDF资料 |
PDF描述 |
|---|---|
| DAC8554IPW | SERIAL INPUT LOADING, 12 us SETTLING TIME, 16-BIT DAC, PDSO16 |
| DAC8564IAPWR | SERIAL INPUT LOADING, 12 us SETTLING TIME, 16-BIT DAC, PDSO16 |
| DAC8564IBPW | SERIAL INPUT LOADING, 12 us SETTLING TIME, 16-BIT DAC, PDSO16 |
| DAC8564ICPWR | SERIAL INPUT LOADING, 12 us SETTLING TIME, 16-BIT DAC, PDSO16 |
| DAC8564IDPW | SERIAL INPUT LOADING, 12 us SETTLING TIME, 16-BIT DAC, PDSO16 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DAC8554IPWRG4 | 功能描述:数模转换器- DAC 16-Bit Quad Ch UltLo Glitch Vltg Output RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| DAC8555 | 制造商:BB 制造商全称:BB 功能描述:16-BIT, QUAD CHANNEL, ULTRALOW GLITCH, VOLTAGE OUTPUT DIGITAL-TO-ANALOG CONVERTER |
| DAC8555EVM | 功能描述:数据转换 IC 开发工具 QUAD CH. DAC RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V |
| DAC8555IPW | 功能描述:数模转换器- DAC 16-Bit Quad Ch UltLo Glitch Vltg Output RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| DAC8555IPW | 制造商:Texas Instruments 功能描述:IC DAC 16BIT QUAD 16-TSSOP 制造商:Texas Instruments 功能描述:IC, DAC 16BIT QUAD 16-TSSOP 制造商:Texas Instruments 功能描述:IC, DAC 16BIT QUAD 16-TSSOP; Resolution (Bits):16bit; Sampling Rate:200kSPS; Input Channel Type:Serial; Supply Voltage Range:2.7V to 5.5V; Digital IC Case Style:TSSOP; No. of Pins:16; Data Interface:3 Wire, Serial; Supply ;RoHS Compliant: Yes |
发布紧急采购，3分钟左右您将得到回复。