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参数资料
| 型号： | DR-TRC101-315-DK |
| 厂商： | RFM |
| 文件页数： | 18/42页 |
| 文件大小： | 0K |
| 描述： | RFIC TRANCEIVER DEVELOPMENT KIT |
| 产品变化通告： | RFIC Obsolescence 15/Sept/2009 |
| 标准包装： | 1 |
| 类型： | 收发器，SRR |
| 频率： | 315MHz |
| 适用于相关产品： | TRC101-315 |
| 已供物品： | 2 个板，2 根天线，电池，线缆，CD |
| 其它名称： | 583-1051 |
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Automatic Frequency Adjust Register - ( continued)
Bit [5..4] – Allowable Frequency Offset : These bits select the amount of offset allowable between
Transmitter and Receiver frequencies. The allowable range can be specified as in Table 6 below.
TABLE 6.
Freq Offset Range RNG1
No Limit 0
RNG0
0
+15*f res /-16*f res
+7*f res /-8*f res
+3*f res /-4*f res
0
1
1
1
0
1
where f res is the tuning resolution for each band as follows:
f res :
315 MHz Band = 2.5kHz
433 MHz Band = 2.5kHz
868 MHz Band = 5kHz
916 MHz Band = 7.5kHz
Bit [3] – Manual Frequency Adjustment Strobe : This bit is the strobe signal that initiates a manual
frequency adjustment sample. When set, a sample of the received signal is compared to the Receiver
LO signal and an offset is calculated. If enabled, this value is written to the Offset Register (See Bit [1])
and added to the frequency control word of the PLL. This bit MUST be reset before initiating another
sample.
Bit [2] – High Accuracy (Fine) Mode : This bit, when set, switches the frequency adjustment mode to
high accuracy. In this mode the processing time is twice the regular mode, but the uncertainty of the
measurement is significantly reduced.
Bit [1] – Frequency Offset Register Enable : This bit, when set, enables the offset value calculated by
the offset sample to be added to the frequency control word of the PLL that tunes the desired carrier
frequency.
Bit [0] – Offset Frequency Enable : This bit, when set, enables the TRC101 to calculate the offset
frequency by the sample taken from the Automatic Frequency Adjustment circuit.
www.RFM.com
Email: info@rfm.com
Page 18 of 42
?by RF Monolithics, Inc.
TRC101 - 4/8/08
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