参数资料
型号: DR-TRC101-315-DK
厂商: RFM
文件页数: 19/42页
文件大小: 0K
描述: RFIC TRANCEIVER DEVELOPMENT KIT
产品变化通告: RFIC Obsolescence 15/Sept/2009
标准包装: 1
类型: 收发器,SRR
频率: 315MHz
适用于相关产品: TRC101-315
已供物品: 2 个板,2 根天线,电池,线缆,CD
其它名称: 583-1051
Transmit Configuration Register [POR=9800h]
Bit
15
1
Bit
14
0
Bit
13
0
Bit
12
1
Bit
11
1
Bit
10
0
Bit
9
0
Bit
8
MODP
Bit
7
DEV3
Bit
6
DEV2
Bit
5
DEV1
Bit
4
DEV0
Bit
3
0
Bit
2
PWR2
Bit
1
PWR1
Bit
0
PWR0
The Transmit Configuration Register configures:
?
?
?
Modulation Polarity
Modulation Bandwidth
Output Transmit Power
Bit [15..9] - Command Code : These bits are the command code that is sent serially to the processor that
identifies the bits to be written to the Transmit Configuration Register.
Bit [8] – Modulation Polarity : When clear, a logic ‘0’ is defined as the lower channel frequency and a
logic ‘1’ as the higher channel frequency (positive deviation). When set, a logic ‘0’ is defined as the
higher channel frequency and a logic ‘1’ as the lower channel frequency (negative deviation).
Bit [7..4] – Modulation Bandwidth : These bits set the FSK frequency deviation for transmitting a logic ‘1’
and logic ‘0’. The deviation is programmable from 15kHz to 240kHz in 15kHz steps. See Table 7 below
for deviation settings.
TABLE 7.
Modulation Bandwidth
15 kHz
30 kHz
45 kHz
60 kHz
75 kHz
90 kHz
105 kHz
120 kHz
135 kHz
150 kHz
165 kHz
180 kHz
195 kHz
210 kHz
225 kHz
240 kHz
Hex
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
DEV3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
DEV2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
DEV1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
DEV0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Bit [3] – Not used . Write as logic ‘0’.
Bit [2..0] – Output Transmit Power : These bits set the transmit output power. The output power is
programmable from Max to -21dB in -3dB steps. See Table 8 below for Output Power settings.
TABLE 8.
Output Power (Relative)
Max
-3dB
-6dB
-9dB
-12dB
-15dB
-18dB
-21dB
Email: info@rfm.com
www.RFM.com
?by RF Monolithics, Inc.
PWR2
0
0
0
0
1
1
1
1
PWR1
0
0
1
1
0
0
1
1
PWR0
0
1
0
1
0
1
0
1
Page 19 of 42
TRC101 - 4/8/08
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