参数资料
型号: DR-TRC103-915-EV
厂商: RFM
文件页数: 61/65页
文件大小: 0K
描述: BOARD EVALUATION 915MHZ RFM RFIC
标准包装: 1
类型: 收发器,SRR
频率: 902MHz ~ 928MHz
适用于相关产品: TRC103-915
已供物品: 2 个板,天线,电池
23. Place TRC103 in transmit mode by setting MCFG00 bits 7..5 set to 100. Monitor IRQ1. It sets when the
when the last bit starts to be transmitted. Allow one bit period for the last bit to be transmitted and then
switch to standby mode by setting MCFG00 bits 7..5 to 001.
24. When ready to receive, Place the TRC103 in synthesizer mode by setting MCFG00 bits 7..5 set to 010.
Monitor the TRC103 Pin 23 to confirm PLL lock.
25. Switch from synthesizer mode to receive mode by setting MCFG00 bits 7..5 to 011.
26. Monitor IRQ0. When an error free packet is received addressed to this node, IRQ0 will set.
27. Switch the TRC103 to standby mode by setting MCFG00 bits 7..5 to 001.
28. Set bit 6 to 1 in PKTCFG1F to enable FIFO read in standby mode.
29. Retrieve the received data from the FIFO through the SPI port.
30. From standby mode, enter another transmit cycle as outlined in steps 20 through 23, or enter another
receive cycle as outlined in steps 24 through 30.
6.7 Battery Power Management Configuration Values
Battery life can be greatly extended in TRC103 applications where transmissions from field nodes are infrequent,
or network communications can be concentrated in periodic time slots. For example, field nodes in many wireless
alarm systems report operational status a few times a day, and can otherwise sleep unless an alarm condition
occurs. Sensor networks that monitor parameters that change relatively slowly, such as air and soil temperature
in agricultural settings, only need to transmit updates a few times an hour.
At room temperature the TRC103 draws a maximum of 1 μA in sleep mode, with a typical value of 100 nA. To
achieve minimum sleep mode current, nSS_CONFIG (Pin 14), SDI (Pin 17) and SCK (Pin 18) must be held logic
low, while nSS_DATA (Pin 15) must be held logic high. Also, the external connection to SDO (Pin 16) must be
configured as high impedance (tri-state or input). The TRC103 can go from sleep mode through standby mode
and synthesizer mode to transmit (or receive) mode in less than 6 ms. At a data rate of 33.33 kb/s, a 32 byte
packet with a 4 byte preamble and a 4 byte start pattern takes about 10 ms to transmit. Assume that the TRC103
then switches to receive mode for 1 second to listen for a response and returns to sleep. On the basis of reporting
every six hours, the ON to sleep duty cycle is about 1:21,259, greatly extending battery life over continuous
transmit-receive or even standby operation. RFM provides an Excel spreadsheet, battery_ life_ calculator.xls, in
the Application Notes section of www.RFM.com to support battery life for various operating scenarios.
The required timing accuracy for the microcontrollers in a sleep-cycled application depends on several things:
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The required “time-stamp” accuracy of data reported by sleeping field nodes. R-C sleep mode timers built
into many microcontrollers have a tolerance of ±20% or more. Where more accurate time stamping is re-
quired, many microcontrollers can run on a watch crystal during sleep and achieve time stamp accuracies
better than one second per 24 hours.
If the base station and any routing nodes present in a network must sleep cycle in addition to the field
nodes, watch crystal control will usually be needed to keep all nodes accurately synchronized to the ac-
tive time slots.
If the base station and any routing nodes present in a network can operate continuously (AC powered,
solar charged batteries, etc.) and a loose time stamp accuracy is OK, the microcontrollers in sleeping field
nodes can usually operated from internal low-accuracy R-C timers.
www.RFM.com E-mail: info@rfm.com
? 2009-2010 by RF Monolithics, Inc.
Technical support +1.800.704.6079
Page 61 of 65
TRC103 - 11/29/12
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