参数资料
型号: DS1075M-60
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: XO, clock
英文描述: 60 MHz, OTHER CLOCK GENERATOR, PDIP8
封装: 0.300 INCH, DIP-8
文件页数: 13/18页
文件大小: 251K
代理商: DS1075M-60
DS1075
4 of 18
the function of the registers are described. The register settings are nonvolatile, the values being stored
automatically in EEPROM when the registers are programmed.
Note: The register bits cannot be used to make mode or frequency changes on the fly. Changes can only
be made by powering the device up in “Programming” mode. For them to be become effective the device
must then be powered down and powered up again in “Operation” mode.
For programming purposes the register bits are divided into two 9-bit words, the “MUX” word
determines mode of operation and prescaler values. The “DIV” word sets the value of the programmable
divider.
MUX WORD Figure 2
(MSB)
(LSB)
0*
EN0
PDN
M
MSEL
DIV1
E/ I
* These bits must be set to zero
E/I
This bit selects either the internal oscillator or the external/ crystal reference.
1=External/Crystal
0=Internal Oscillator
however, if the PDN bit is set to zero the E/I bit will be overridden by the logic level on the
PDN
/ SELX pin.
Table 1
PDN
BIT
E/ I
PDN
/ SELX
PIN
OSCILLATOR
MODE
0
X
0
EXTERNAL/CRYSTAL
0
X
1
INTERNAL
1
X
0
POWER-DOWN
1
0
1
INTERNAL
1
EXTERNAL/CRYSTAL
DIV1
This bit allows the master clock to be routed directly to the output (DIV1=1). The N programmable
divider is bypassed so the programmed value of N is ignored. The frequency of the output (fOUT) will be
INTCLK or EXTCLK depending on which reference has been selected. If the Internal clock is selected
the M prescaler is also bypassed (the bit values of MSEL and M are ignored) so in this case fOUT
=INTOSC (which also equals MCLK and INTCLK). If DIV1=0 the prescaler and programmable divider
function normally.
MSEL
This bit determines whether or not the M prescaler is bypassed. MSEL =1 will bypass the prescaler.
MSEL
=0 will switch in the prescaler (unless overridden by DIV1=1), with a divide-by number
determined by the M bit.
M
This bit sets the divide-by number for the prescaler. M=0 results in divide-by-4, M=1 results in divide-
by-2. The setting of this bit is irrelevant if either DIV1=1 or MSEL =1.
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